PIXEL CIRCUIT, ARRAY SUBSTRATE, DISPLAY DEVICE AND CONTROLLING METHOD THEREOF
First Claim
1. A pixel circuit, comprising:
- a pixel display unit, comprising n sub-pixel display units, wherein n≥
3; and
a data signal control unit, coupled to the pixel display unit, n data lines, and a control line, wherein the n data lines drive the pixel display unit,wherein the data signal control unit is configured to, under a condition that a first control signal is input through the control line, couple the n sub-pixel display units to the n data lines configured to drive the n sub-pixel display units respectively; and
under a condition that a second control signal is input through the control line, couple one of the n data lines configured to drive the pixel display unit to at least one of the n sub-pixel display units in the pixel display unit,wherein the first control signal is one of a high level signal and a low level signal, and the second control signal is the other one of the high level signal and the low level signal.
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Abstract
Embodiments of the present disclosure provide a pixel circuit, an array substrate, a display device and a controlling method thereof. The pixel circuit includes: a pixel display unit consisted of n sub-pixel display units, n≥3; and a data signal control unit coupled to the pixel display unit, n data lines for driving the pixel display unit and a control line. The data signal control unit is configured to, under a condition that a first control signal is input through the control line, couple the n sub-pixel display units to the n data lines for driving the n sub-pixel display units respectively; and when a second control signal is input through the control line couple one of the n data lines for driving the pixel display unit to at least one of the n sub-pixel display units in the pixel display unit.
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Citations
20 Claims
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1. A pixel circuit, comprising:
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a pixel display unit, comprising n sub-pixel display units, wherein n≥
3; anda data signal control unit, coupled to the pixel display unit, n data lines, and a control line, wherein the n data lines drive the pixel display unit, wherein the data signal control unit is configured to, under a condition that a first control signal is input through the control line, couple the n sub-pixel display units to the n data lines configured to drive the n sub-pixel display units respectively; and
under a condition that a second control signal is input through the control line, couple one of the n data lines configured to drive the pixel display unit to at least one of the n sub-pixel display units in the pixel display unit,wherein the first control signal is one of a high level signal and a low level signal, and the second control signal is the other one of the high level signal and the low level signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. An array substrate, comprising a plurality of data lines and a plurality of gate lines and a plurality of sub-pixel regions that are defined by the plurality of data lines and the plurality of gate lines which cross each other in an insulated manner,
wherein one pixel region is consisted of n sub-pixel regions, and the array substrate further comprises a plurality of control lines crossing the plurality of data lines, each of pixel regions is disposed with a pixel circuit and each row of the pixel regions arranged along a direction of the gate line is coupled to one of the control lines, wherein the pixel circuit comprises: -
a pixel display unit, comprising n sub-pixel display units, wherein n≥
3; anda data signal control unit, coupled to the pixel display unit, n data lines, and a control line, wherein the n data lines drive the pixel display unit, wherein the data signal control unit is configured to, under a condition that a first control signal is input through the control line, couple the n sub-pixel display units to the n data lines that drive the n sub-pixel display units respectively; and
under a condition that a second control signal is input through the control line, couple one of the n data lines configured to drive the pixel display unit to at least one of the n sub-pixel display units in the pixel display unit,wherein the first control signal is one of a high level signal and a low level signal, and the second control signal is the other one of the high level signal and the low level signal. - View Dependent Claims (15, 16, 17, 18, 19, 20)
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12. A display device, comprising an array substrate,
wherein the array substrate comprises a plurality of data lines and a plurality of gate lines and a plurality of sub-pixel regions that are defined by the plurality of data lines and the plurality of gate lines which cross each other in an insulated manner, wherein one pixel region is consisted of n sub-pixel regions, and the array substrate further comprises a plurality of control lines crossing the plurality of data lines, each of pixel regions is disposed with a pixel circuit and each row of the pixel regions arranged along a direction of the gate line is coupled to one of the control lines, wherein the pixel circuit comprises: -
a pixel display unit consisted of n sub-pixel display units, n≥
3; anda data signal control unit coupled to the pixel display unit, n data lines configured to drive the pixel display unit and the control line, wherein the data signal control unit is configured to, under a condition that a first control signal is input through the control line, couple the n sub-pixel display units to the n data lines that drive the n sub-pixel display units respectively; and
under a condition that a second control signal is input through the control line, couple one of the n data lines configured to drive the pixel display unit to at least one of the n sub-pixel display units in the pixel display unit,wherein the first control signal is one of a high level signal and a low level signal, and the second control signal is the other one of the high level signal and the low level signal. - View Dependent Claims (11, 13, 14)
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Specification