Pixel Circuit, Display Panel and Driving Method Thereof

• US 20190005877A1
• Filed: 02/28/2017
• Published: 01/03/2019
• Est. Priority Date: 06/12/2016
• Status: Active Grant

• Current Assignee: BOE Technology Group Co., Ltd.
• Original Assignee: BOE Technology Group Co., Ltd.
• Inventors: Dong, Tian
• Granted Patent: US 10,388,218 B2
• Time in Patent Office: Days
• CPC Class Codes: G09G 2300/043 Compensation electrodes or other additional electrodes in matrix displays related to distortions or compensation signals, e.g. for modifying TFT threshold voltage in column driver
• CPC Class Codes: G09G 2300/0819 used for counteracting undesired variations, e.g. feedback or autozeroing
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0861 with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
• CPC Class Codes: G09G 2320/0233 Improving the luminance or brightness uniformity across the screen
• CPC Class Codes: G09G 3/3208 organic, e.g. using organic light-emitting diodes [OLED]
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: G09G 3/3266 Details of drivers for scan electrodes
• CPC Class Codes: G09G 3/3291 in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements

Abstract

A pixel circuit, a display panel and a driving method are described. The pixel circuit includes: a light-emitting circuit configured for emitting light during a working period; a driving circuit configured for driving the light-emitting circuit; a compensating circuit configured for compensating the driving circuit; a data writing circuit configured for writing data to the driving circuit; a reset circuit configured for resetting the compensating circuit and the driving circuit; a first light-emitting control circuit configured for controlling ON and OFF of the light-emitting circuit.

Claims

1. A pixel circuit, comprising:

a light-emitting circuit configured for emitting light during a working period;

a driving circuit configured for driving the light-emitting circuit;

a compensating circuit configured for compensating the driving circuit;

a data writing circuit configured for writing data to the driving circuit;

a reset circuit configured for resetting the compensating circuit and the driving circuit;

a first light-emitting control circuit configured for controlling ON and OFF of the light-emitting circuit;

a first voltage terminal and a second voltage terminal configured for providing light-emitting voltages for the light-emitting circuit;

a reset voltage terminal configured for providing a resetting voltage for the reset circuit;

a reference voltage terminal configured for providing a compensating voltage for the compensating circuit;

a scan control terminal configured for providing a signal that controls ON and OFF of the compensating circuit and the data writing circuit;

a data signal terminal configured for providing a data signal for the data writing circuit;

a reset control terminal configured for providing a signal that controls ON and OFF of the reset circuit; and

a first light-emitting control terminal configured for providing a signal that controls ON and OFF of the first light-emitting control circuit.

2. The pixel circuit according to claim 1, wherein,

the compensating circuit comprises a first transistor and a storage capacitor connected in series;

the data writing circuit comprises a second transistor and a third transistor connected in series;

the reset circuit comprises a fourth transistor,

the driving circuit comprises a fifth transistor,

the first light-emitting control circuit comprises a sixth transistor, and

the light-emitting circuit comprises an organic light-emitting diode.

3. The pixel circuit according to claim 2, wherein,

a source of the first transistor is electrically connected with the reference voltage terminal, a gate of the first transistor is electrically connected with the scan control terminal, and a drain of the first transistor is electrically connected with a first node;

a source of the second transistor is electrically connected with the data signal terminal, a gate of the second transistor is electrically connected with the scan control terminal, and a drain of the second transistor is electrically connected with a source of the third transistor;

a gate of the third transistor is electrically connected with a drain of the third transistor, and the drain of the third transistor is electrically connected with a second node;

a source of the fourth transistor is electrically connected with the reset voltage terminal, a gate of the fourth transistor is electrically connected with the reset control terminal, and a drain of the fourth transistor is electrically connected with the second node;

a source of the fifth transistor is electrically connected with the first node, and a gate of the fifth transistor is electrically connected with the second node;

a source of the sixth transistor is electrically connected with the first voltage terminal, a gate of the sixth transistor is electrically connected with the first light-emitting control terminal, and a drain of the sixth transistor is electrically connected with the first node;

a first terminal of the storage capacitor is electrically connected with the first node, and a second terminal of the storage capacitor is electrically connected with the second node; and

a first terminal of the organic light-emitting diode is electrically connected with a drain of the fifth transistor, and a second terminal of the organic light-emitting diode is electrically connected with the second voltage terminal.

4. The pixel circuit according to claim 1, further comprising:

a second light-emitting control circuit configured for controlling ON and OFF of the light-emitting circuit; and

a second light-emitting control terminal configured for providing a signal that controls ON and OFF of the second light-emitting control circuit.

5. The pixel circuit according to claim 4, wherein the first light-emitting control terminal and the second light-emitting control terminal are electrically connected with each other.

6. The pixel circuit according to claim 4, wherein,

the compensating circuit comprises a first transistor and a storage capacitor connected in series,

the data writing circuit comprises a second transistor and a third transistor connected in series,

the reset circuit comprises a fourth transistor,

the driving circuit comprises a fifth transistor,

the first light-emitting control circuit comprises a sixth transistor,

the second light-emitting control circuit comprises a seventh transistor, and

the light-emitting circuit comprises an organic light-emitting diode.

7. The pixel circuit according to claim 6, wherein,

a source of the first transistor is electrically connected with the reference voltage terminal, a gate of the first transistor is electrically connected with the scan control terminal, and a drain of the first transistor is electrically connected with a first node;

a source of the second transistor is electrically connected with the data signal terminal, a gate of the second transistor is electrically connected with the scan control terminal, and a drain of the second transistor is electrically connected with a source of the third transistor;

a gate of the third transistor is electrically connected with a drain of the third transistor, and the drain of the third transistor is electrically connected with a second node;

a source of the fourth transistor is electrically connected with the reset voltage terminal, a gate of the fourth transistor is electrically connected with the reset control terminal, and a drain of the fourth transistor is electrically connected with the second node;

a source of the fifth transistor is electrically connected with the first node, and a gate of the fifth transistor is electrically connected with the second node;

a source of the sixth transistor is electrically connected with the first voltage terminal, a gate of the sixth transistor is electrically connected with the first light-emitting control terminal, and a drain of the sixth transistor is electrically connected with the first node;

a first terminal of the storage capacitor is electrically connected with the first node, and a second terminal of the storage capacitor is electrically connected with the second node; and

a source of the seventh transistor is electrically connected with a drain of the fifth transistor, a gate of the seventh transistor is electrically connected with the second light-emitting control terminal, a first terminal of the organic light-emitting diode is electrically connected with a drain of the seventh transistor, and a second terminal of the organic light-emitting diode is electrically connected with the second voltage terminal;

or, a first terminal of the organic light-emitting diode is electrically connected with a drain of the fifth transistor, a second terminal of the organic light-emitting diode is electrically connected with a source of the seventh transistor, a gate of the seventh transistor is electrically connected with the second light-emitting control terminal, and a drain of the seventh transistor is electrically connected with the second voltage terminal.

8. The pixel circuit according to claim 2, wherein a threshold voltage of the third transistor and a threshold voltage of the fifth transistor are equal to each other.

9. The pixel circuit according to claim 6, wherein the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, and the seventh transistor are thin-film transistors.

10. The pixel circuit according to claim 6, wherein the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, and the seventh transistor are P-type transistors.

11. A display panel, comprising the pixel circuit according to claim 1.

12. A driving method for the pixel circuit according to claim 1, comprising a resetting phase, a threshold compensating and data writing phase, and an IR drop compensating and light emitting phase.

13. The driving method according to claim 12, wherein,

during the resetting phase, the reset control terminal outputs a valid signal, the scan control terminal outputs an invalid signal, and the first light-emitting control terminal outputs an invalid signal.

14. The driving method according to claim 12, wherein,

during the threshold compensating and data writing phase, the reset control terminal outputs an invalid signal, the scan control terminal outputs a valid signal, and the first light-emitting control terminal outputs an invalid signal.

15. The driving method according to claim 12, wherein,

during the IR drop compensating and light emitting phase, the reset control terminal outputs an invalid signal, the scan control terminal outputs an invalid signal, and the first light-emitting control terminal outputs a valid signal.

16. A driving method for the pixel circuit according to claim 4, comprising a resetting phase, a threshold compensating and data writing phase, and an IR drop compensating and light emitting phase.

17. The driving method according to claim 16, wherein,

during the resetting phase, the reset control terminal outputs a valid signal, the scan control terminal outputs an invalid signal, and the first light-emitting control terminal and the second light-emitting control terminal outputs an invalid signal.

18. The driving method according to claim 16, wherein,

during the threshold compensating and data writing phase, the reset control terminal outputs an invalid signal, the scan control terminal outputs a valid signal, and the first light-emitting control terminal and the second light-emitting control terminal outputs an invalid signal.

19. The driving method according to claim 16, wherein,

during the IR drop compensating and light emitting phase, the reset control terminal outputs an invalid signal, the scan control terminal outputs an invalid signal, and the first light-emitting control terminal and the second light-emitting control terminal outputs a valid signal.

20. The pixel circuit according to claim 6, wherein a threshold voltage of the third transistor and a threshold voltage of the fifth transistor are equal to each other.