SEMICONDUCTOR DEVICE

• US 20190013394A1
• Filed: 09/04/2018
• Published: 01/10/2019
• Est. Priority Date: 04/24/2017
• Status: Active Grant

• Current Assignee: United Microelectronics Corporation
• Original Assignee: United Microelectronics Corporation
• Inventors: Yin, Tan-Ya, Huang, Chia-Wei
• Granted Patent: US 10,446,663 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 21/3085 characterised by their behaviour during the process, e.g. soluble masks, redeposited masks
• CPC Class Codes: H01L 21/823431 with a particular manufacturing method of transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 27/0886 including transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/0692 Surface layout
• CPC Class Codes: H01L 29/4238 characterised by the surface lay-out
• CPC Class Codes: H01L 29/66545 using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
• CPC Class Codes: H01L 29/66795 with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/785 having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/7853 the body having a non-rectangular crossection

Abstract

A semiconductor device is provided. The semiconductor device includes a substrate and a patterned metal gate layer. The substrate includes a first fin segment and a second fin segment respectively protruding from a top surface of the substrate. The first fin segment and the second fin segment respectively extend along a first direction and are arranged along a second direction, the first fin segment comprises a first fin structure at an end of the first segment, and the second fin segment comprises a first recess at an end of the second fin segment, and the first recess and the first fin structure are arranged along the second direction. The patterned metal gate layer is disposed on the substrate, and the patterned metal gate layer covers the first fin structure.

Claims

1. A semiconductor device, comprising:

a substrate comprising a first fin segment and a second fin segment respectively protruding from a top surface of the substrate, wherein the first fin segment and the second fin segment respectively extend along a first direction and are arranged along a second direction, the first fin segment comprises a first fin structure at an end of the first segment, and the second fin segment comprises a first recess at an end of the second fin segment, and the first recess and the first fin structure are arranged along the second direction; and

a patterned metal gate layer disposed on the substrate, wherein the patterned metal gate layer covers the first fin structure.

2. The semiconductor device according to claim 1, wherein the first recess is not covered by the patterned metal gate layer.

3. The semiconductor device according to claim 1, wherein the second fin segment further comprises a second fin structure adjacent to the first recess.

4. The semiconductor device according to claim 3, wherein the substrate further comprises a fifth fin structure and a second recess, the fifth fin structure protrudes from the top surface of the substrate, the fifth fin structure and the second fin structure are aligned in a line, and the second recess is disposed at an end of the fifth fin structure facing the second fin structure, wherein the patterned metal gate layer does not cover the second recess.

5. The semiconductor device according to claim 4, wherein the first recess and the second recess are symmetrical to each other with respect to the second direction.

6. The semiconductor device according to claim 4, wherein a space exists between the first recess and the second recess, and the space is greater than 70 nanometers.

7. The semiconductor device according to claim 4, wherein no fin structure exists between the second fin structure and the fifth fin structure.

8. The semiconductor device according to claim 1, further comprising a first epitaxial layer disposed in the first recess.

9. The semiconductor device according to claim 1, further comprising a fourth fin structure, and the first recess is disposed between the first fin structure and the fourth fin structure.

10. The semiconductor device according to claim 9, wherein the patterned metal gate layer covers the fourth fin structure.

11. The semiconductor device according to claim 1, wherein the first fin segment further comprises a third fin structure and a third recess between the first fin structure and the third fin structure, and a length of the first recess in the first direction is greater than a length of the third recess in the first direction.

12. The semiconductor device according to claim 1, wherein the patterned metal gate layer comprises a metal gate covering the first fin structure.