×

PROCESSORS, METHODS, AND SYSTEMS WITH A CONFIGURABLE SPATIAL ACCELERATOR

  • US 20190018815A1
  • Filed: 07/01/2017
  • Published: 01/17/2019
  • Est. Priority Date: 07/01/2017
  • Status: Active Grant
First Claim
Patent Images

1. An apparatus comprising:

  • a first tile and a second tile, each comprising a plurality of processing elements and an interconnect network between the plurality of processing elements to receive an input of a dataflow graph comprising a plurality of nodes, wherein the dataflow graph is to be overlaid into the interconnect network and the plurality of processing elements of the first tile and the second tile with each node represented as a dataflow operator in the interconnect network and the plurality of processing elements of the first tile or the second tile, and the plurality of processing elements of the first tile and the second tile are to perform an operation when an incoming operand set arrives at the plurality of processing elements of the first tile and the second tile; and

    a synchronizer circuit coupled between the interconnect network of the first tile and the interconnect network of the second tile and comprising storage to store data to be sent between the interconnect network of the first tile and the interconnect network of the second tile, the synchronizer circuit to convert the data from the storage between a first voltage or a first frequency of the first tile and a second voltage or a second frequency of the second tile to generate converted data, and send the converted data between the interconnect network of the first tile and the interconnect network of the second tile.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×