PWM CONTROL SCHEME FOR PROVIDING MINIMUM ON TIME

• US 20190020274A1
• Filed: 07/09/2018
• Published: 01/17/2019
• Est. Priority Date: 07/14/2017
• Status: Active Grant

• Current Assignee: Renesas Electronics America Inc.(f/k/a Integrated Device Technology, Inc) (Renesas Electronics Corporation)
• Original Assignee: Renesas Electronics America Inc.(f/k/a Integrated Device Technology, Inc) (Renesas Electronics Corporation)
• Inventors: LI, Bin, SHAH, Mehul, LI, Minghua, SOLIE, Eric
• Granted Patent: US 10,447,154 B2
• Time in Patent Office: Days
• CPC Class Codes: H02M 3/07 using capacitors charged and discharged alternately by semiconductor devices with control electrode , e.g. charge pumps
• CPC Class Codes: H02M 3/072 adapted to generate an output voltage whose value is lower than the input voltage
• CPC Class Codes: H02M 3/157 with digital control

Abstract

According to certain aspects, the present embodiments are based on an improved switched-capacitor (SC) converter topology that typically does not include an inductor. In particular, the topology includes a ladder SC circuit configured as a cap divider. The cap divider can be used to provide an unregulated output voltage Vout that is a certain fraction (e.g. 2) of input voltage Vin, such as Vin/2 (i.e., duty cycle≈50%). In some embodiments of a PWM control scheme for this topology, the PWM OFF pulse is free running, determined by the logic combination of timer and VOUT comparator. The PWM OFF pulse width is measured and used as the reference for a minimum PWM ON timer. The PWM ON pulse is therefore forced to be at least a minimum width that is proportional to the PWM OFF pulse. A UVOV protection window can be added to ignore the minimum PWM ON timer during a load transient.

Claims

1. A controller for a switched-capacitor converter that generates a PWM signal for converting an input voltage to an output voltage, the PWM signal having a PWM OFF portion and a PWM ON portion which together define a duty cycle of the PWM signal, the controller comprising:

a PWM OFF logic block that generates the PWM OFF portion of the PWM signal; and

a PWM ON logic block that measures an OFF duration of the PWM OFF portion of the PWM signal and is configured to cause the PWM ON portion of the PWM signal to have an ON duration based on the OFF duration.

2. The controller of claim 1, wherein the duty cycle is ½

and the ON duration is substantially the same as the OFF duration.

3. The controller of claim 1, wherein the PWM OFF logic block generates the PWM OFF portion of the PWM signal by comparing the output voltage to a voltage proportional to the input voltage.

4. The controller of claim 1, wherein the PWM ON logic block includes a first capacitor that is charged during the PWM OFF portion so as to measure the OFF duration of the PWM signal.

5. The controller of claim 4, wherein the PWM ON logic block further includes a second capacitor that is charged during the PWM ON portion, and wherein a voltage on the second capacitor is used to control the ON duration of the PWM signal.

6. The controller of claim 1, wherein the PWM OFF logic block further includes an undervoltage protection circuit.

7. The controller of claim 1, further comprising minimum switching frequency protection circuitry.

8. The controller of claim 1, further comprising maximum switching frequency protection circuitry.

9. A method for controlling a switched-capacitor converter that converts an input voltage to an output voltage based on a PWM signal, the PWM signal having a PWM OFF portion and a PWM ON portion which together define a duty cycle of the PWM signal, the method comprising:

generating the PWM OFF portion of the PWM signal;

measuring an OFF duration of the PWM OFF portion of the PWM signal; and

causing the PWM ON portion of the PWM signal to have an ON duration based on the OFF duration.

10. The method of claim 9, wherein the duty cycle is ½

and the ON duration is substantially the same as the OFF duration.

11. The method of claim 9, wherein the PWM OFF portion of the PWM signal is generated by comparing the output voltage to a voltage proportional to the input voltage.

12. The method of claim 9, wherein measuring the OFF duration of the PWM OFF signal includes charging a first capacitor during the PWM OFF portion of the PWM signal.

13. The method of claim 12, wherein causing the ON duration of the PWM ON portion of the PWM signal to be based on the OFF duration includes charging a second capacitor during the PWM ON portion, and using a voltage on the second capacitor to control the ON duration of the PWM signal.

14. The method of claim 9, further comprising protecting against an undervoltage condition of the output voltage.

15. The method of claim 9, further comprising protecting against a minimum switching frequency of the PWM signal.

16. The method of claim 9, further comprising protecting against a maximum switching frequency of the PWM signal.