METHOD OF CONTROLLING ERROR CHECK AND CORRECTION (ECC) OF NON-VOLATILE MEMORY DEVICE AND MEMORY SYSTEM PERFORMING THE SAME
First Claim
1. A method for controlling error check and correction (ECC) of a non-volatile memory device, the method comprising:
- storing write data in a plurality of storing regions of the non-volatile memory device, the write data generated by performing ECC encoding;
performing individual ECC decoding based on each of a plurality of read data that are read out from the plurality of storing regions;
providing logic operation data by performing a logic operation of the plurality of read data when the individual ECC decoding fails with respect to all of the plurality of read data; and
performing a combined ECC decoding based on the logic operation data.
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Abstract
A method for controlling error check and correction (ECC) of a non-volatile memory device includes storing write data in a plurality of storing regions. The write data may be generated by performing ECC encoding. Individual ECC decoding may be performed based on each of a plurality of read data read out from the storing regions. Logic operation data may be provided by performing a logic operation of the read data when the individual ECC decoding fails with respect to all of the read data. Combined ECC decoding may be performed based on the logic operation data.
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Citations
20 Claims
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1. A method for controlling error check and correction (ECC) of a non-volatile memory device, the method comprising:
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storing write data in a plurality of storing regions of the non-volatile memory device, the write data generated by performing ECC encoding; performing individual ECC decoding based on each of a plurality of read data that are read out from the plurality of storing regions; providing logic operation data by performing a logic operation of the plurality of read data when the individual ECC decoding fails with respect to all of the plurality of read data; and performing a combined ECC decoding based on the logic operation data. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A memory system, comprising:
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an error check and correction (ECC) encoder to perform an ECC encoding to generate write data; a non-volatile memory device to store the write data in a plurality of storing regions of the non-volatile memory device; and an ECC decoder to perform an individual ECC decoding based on each of a plurality of read data that are read out from the plurality of storing regions, provide logic operation data by performing a logic operation of the plurality of read data when the individual ECC decoding fails, and perform a combined ECC decoding based on the logic operation data. - View Dependent Claims (17, 18, 19)
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20. A non-transitory computer-readable medium comprising code, which, when executed by a processor, causes the processor to control error check and correction (ECC) of a non-volatile memory device, the medium comprising:
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code to store write data in a plurality of storing regions of the non-volatile memory device, the write data generated by performing ECC encoding; code to perform individual ECC decoding based on each of a plurality of read data that are read out from the plurality of storing regions; code to provide logic operation data by performing a logic operation of the plurality of read data when the individual ECC decoding fails with respect to all of the plurality of read data; and code to perform a combined ECC decoding based on the logic operation data.
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Specification