DISPLAY SUBSTRATE COMPRISING INTERCONNECTED FIRST AND SECOND WIRINGS AND DISPLAY DEVICE INCLUDING THE SAME
First Claim
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1. A method of manufacturing a display substrate, comprising:
- forming a first semiconductor layer on a base substrate;
forming a first gate insulation layer to cover the first semiconductor layer on the base substrate;
forming a gate electrode and a first wiring on the first gate insulation layer;
forming a second gate insulation layer to cover the gate electrode and the first wiring;
forming a second wiring on the second gate insulation layer, the second wiring being formed over the first wiring and electrically connected to the first wiring; and
forming a source electrode and a drain electrode, the source and drain electrodes being electrically connected, through the second and first gate insulation layers, to the first semiconductor layer.
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Abstract
Display substrates and display devices with reduced electrical resistance are disclosed. One inventive aspect includes a switching device, a first wiring and a second wiring. The switching device includes a first semiconductor layer, first and second gate insulation layers, a source electrode and a drain electrode. The source and drain electrodes are formed to electrically connect, through the first and second gate insulation layers, to the first semiconductor layer. The second wiring is formed on the second gate insulation layer and electrically connected to the first wiring.
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Citations
8 Claims
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1. A method of manufacturing a display substrate, comprising:
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forming a first semiconductor layer on a base substrate; forming a first gate insulation layer to cover the first semiconductor layer on the base substrate; forming a gate electrode and a first wiring on the first gate insulation layer; forming a second gate insulation layer to cover the gate electrode and the first wiring; forming a second wiring on the second gate insulation layer, the second wiring being formed over the first wiring and electrically connected to the first wiring; and forming a source electrode and a drain electrode, the source and drain electrodes being electrically connected, through the second and first gate insulation layers, to the first semiconductor layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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Specification