ROUTING DATA BLOCKS DURING THERMAL THROTTLING

• US 20190050153A1
• Filed: 08/08/2017
• Published: 02/14/2019
• Est. Priority Date: 08/08/2017
• Status: Abandoned Application

• Current Assignee: Western Digital Technologies Incorporated (Western Digital Corporation)
• Original Assignee: Western Digital Technologies Incorporated (Western Digital Corporation)
• Inventors: YANG, Nian Niles, KAMILA, Varuna
• Application Number:
  US15/672,260
• Publication Number:
  US 20190050153A1
• Time in Patent Office: Days
• CPC Class Codes: G06F 1/206 comprising thermal management
• CPC Class Codes: G06F 1/3225 of memory devices
• CPC Class Codes: G06F 1/3275 Power saving in memory, e.g. RAM, cache
• CPC Class Codes: G06F 3/061 Improving I/O performance
• CPC Class Codes: G06F 3/0613 in relation to throughput
• CPC Class Codes: G06F 3/0614 Improving the reliability of storage systems
• CPC Class Codes: G06F 3/0634 by changing the state or mode of one or more devices
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G11C 11/5628 Programming or writing circuits; Data input circuits
• CPC Class Codes: G11C 11/5642 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 16/0483 comprising cells having several storage transistors connected in series
• CPC Class Codes: G11C 16/08 Address circuits; Decoders; Word-line control circuits
• CPC Class Codes: G11C 16/10 Programming or data input circuits
• CPC Class Codes: G11C 16/26 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 7/04 with means for avoiding disturbances due to temperature effects
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management
• CPC Class Codes: Y02D 30/50 in wire-line communication networks, e.g. low power modes or reduced link rate

Abstract

Embodiments of a SSD include a controller coupled to one or more flash dies, one or more temperature sensors proximate to the one or more flash dies, and data storing instructions. The one or more flash dies includes a plurality of TLC (triple level cell) blocks. The controller when executing the data storing instructions cause the controller to periodically fetch a temperature reading from the one or more temperature sensors and limit operations to the one or more flash dies when the temperature reading is above a start throttling threshold. In certain embodiments, TLC blocks are written to in a SLC mode when the temperature reading is above the start throttling threshold. In other embodiments, one or more spare SLC blocks are written to with non-system data during throttling.

Claims

1. A solid state drive, comprising:

a controller;

one or more flash dies comprising a plurality of triple level cell (TLC) blocks;

one or more temperature sensors proximate to the one or more flash dies; and

a non-transitory computer readable storage medium containing data storing instructions that, when executed by the controller, cause the controller to;

periodically fetch a temperature reading from the one or more temperature sensors;

limit operations to the one or more flash dies when the temperature reading is above a start throttling threshold; and

write to the TLC blocks in a SLC mode when the temperature reading is above the start throttling threshold.

2. The solid state drive of claim 1, further comprising an assignment table wherein the data storing instructions further cause the controller to flag in the assignment table the TLC blocks written in the SLC mode.

3. The solid state drive of claim 1, wherein the data storing instructions further cause the controller to fold the TLC blocks written in the SLC mode into TLC blocks in a TLC mode when the temperature reading is below a stop throttling threshold.

4. The solid state drive of claim 3, wherein the data storing instructions further cause the controller to increase a program-erase count of the folded TLC blocks.

5. The solid state drive of claim 1, wherein the one or more flash dies further comprise a plurality of single level cell (SLC) blocks and wherein the data storing instructions further cause the controller to scan for one or more spare SLC blocks from the plurality of SLC blocks when the temperature reading is above the start throttling threshold.

6. The solid state drive of claim 5, wherein the data storing instructions further cause the controller to write to the one or more spare SLC blocks prior to the write to the TLC blocks when the temperature reading is above the start throttling threshold.

7. A method of storing data in a solid state drive (SSD), the SSD comprising a plurality of memory dies, the memory dies comprising a plurality of multiple-bits-per-cell (MBC) blocks, the method comprising:

periodically fetching a temperature of the memory dies;

throttling the memory dies when the temperature is above a start throttling threshold; and

writing to MBC blocks in a single-bit-per-cell (SBC) mode during throttling.

8. The method of claim 7, further comprising flagging the MBC blocks written to in the SBC mode.

9. The method of claim 7, further comprising folding the MBC blocks written to in the SBC mode into MBC blocks in a MBC mode when the temperature is below a stop throttling threshold.

10. The method of claim 9, further increasing a program-erase count of the folded MBC blocks.

11. The method of claim 7, wherein the plurality of memory dies further comprises a plurality of SBC blocks, the method further comprising scanning for one or more spare SBC blocks from the plurality SBC blocks during throttling.

12. The method of claim 11, further comprising writing to the spare SBC blocks prior to the writing to the MBC blocks during throttling.

13. A method of storing data in a solid state drive (SSD), the SSD comprising a non-volatile memory, the non-volatile memory comprising a plurality of multiple-bits-per-cell (MBC) blocks and a plurality of single-bit-per-cell (SBC) blocks, the method comprising:

periodically fetching a temperature of the non-volatile memory;

throttling the non-volatile memory when the temperature is above a start throttling threshold;

scanning for one or more spare SBC blocks from the plurality of SLC blocks when the temperature reading is above the start throttling threshold; and

writing to the one or more spare SBC blocks with non-system data during throttling.

14. The method of claim 13, wherein writing to the one or more spare SBC blocks comprises rerouting writing of MBC blocks to the one or more spare SBC blocks.

15. The method of claim 13, further comprising flagging spare SBC blocks written to with non-system data during throttling.

16. The method of claim 13, wherein the MBC blocks are TLC blocks and the SBC blocks are SLC blocks.

17. The method of claim 13, further comprising folding spare SBC blocks written to with non-system data during throttling into MBC blocks when the temperature reading is below a stop throttling threshold.

18. The method of claim 17, further comprising increasing a program-erase count of the folded SBC blocks with non-system data.

19. A memory storage system, comprising:

a controller means;

a non-volatile memory means for storing data;

the non-volatile memory means capable to store data in a high-performance low-capacity mode and in a low-performance high-capacity mode;

a temperature sensor proximate to the non-volatile memory means; and

a non-transitory computer readable storage medium containing data storing instructions that, when executed by the controller means, cause the controller to;

periodically fetch a temperature reading from the temperature sensor;

throttle operations to the non-volatile memory means when the temperature reading is above a start throttling threshold; and

write to the non-volatile memory means to store data in a high-performance low-capacity mode when the temperature reading is above the start throttling threshold.

20. The memory storage system of claim 19, wherein the data storing instructions further cause the controller means to fold data stored in the high-performance low-capacity mode into the low-performance high-capacity mode when the temperature reading is below a stop throttling threshold.

21. The memory storage system of claim 19, wherein the blocks operating in the high-performance low capacity mode generates less heat than the blocks operating in the low-performance high-capacity mode.

22. The memory storage system of claim 19, wherein the data storing instructions further cause the controller means to write data faster in the high-performance low capacity mode than the low-performance high-capacity mode.

23. A method of operating a solid state drive (SSD), the SSD comprising a plurality of memory dies, the memory dies comprising a plurality of blocks, the method comprising:

periodically fetching a temperature of the memory dies;

throttling the memory dies when the temperature is above a start throttling threshold;

writing data to the blocks in a single-bit-per-cell (SBC) mode during throttling; and

flagging the blocks written in the SBC mode.

24. The method of claim 23, further comprising decoding the written data in a read operation by determining whether the blocks have been flagged in the SBC mode.

25. The method of claim 23, further comprising folding the blocks written in the SBC mode into the blocks in a multiple-bits-per-cell (MBC) mode when the temperature is below a stop throttling threshold.

26. The method of claim 25, wherein folding the blocks comprises determining whether the blocks have been flagged in the SBC mode.