ELECTRONIC COMPONENT FOOTPRINT VERIFICATION SYSTEM AND A METHOD THEREOF

• US 20190050518A1
• Filed: 08/08/2017
• Published: 02/14/2019
• Est. Priority Date: 08/08/2017
• Status: Active Grant

• Current Assignee: Footprintku Inc.
• Original Assignee: Footprintku Inc.
• Inventors: Jiang, Yu-Siang Fan, Horng, Mong-Fong Fan, Wang, Yan-Jhih, Wei, Jun-Qiang, Chen, Yi-Ting
• Granted Patent: US 10,339,263 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 16/23 Updating
• CPC Class Codes: G06F 2111/02 CAD in a network environment, e.g. collaborative CAD or distributed simulation
• CPC Class Codes: G06F 2111/12 Symbolic schematics
• CPC Class Codes: G06F 2115/12 Printed circuit boards [PCB] or multi-chip modules [MCM]
• CPC Class Codes: G06F 30/18 Network design, e.g. design based on topological or interconnect aspects of utility systems, piping, heating ventilation air conditioning [HVAC] or cabling circuit design at the physical level G06F30/39; network planning tools for wireless communication networks H04W16/18
• CPC Class Codes: G06F 30/39 Circuit design at the physical level physical level design for reconfigurable circuits G06F30/347
• CPC Class Codes: G06F 30/392 Floor-planning or layout, e.g. partitioning or placement
• CPC Class Codes: G06F 30/398 Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] optical proximity correction [OPC] design processes G03F1/36

Abstract

An electronic component footprint verification system and a method thereof are provided in the present disclosure. The system is available to an external user for selecting an electronic component footprint to be verified, reading a verification rule checklist in an external database, extracting characteristics of the electronic component footprint, accessing characteristic data from the electronic component footprint, verifying the characteristic data based on the verification rule checklist, and displaying a verification result.

Claims

1. An electronic component footprint verification system, comprising:

a user interface available to an external user for selecting an electronic component footprint to be verified wherein the electronic component footprint conforms to file formats of a corresponding circuit layout system;

a setup regulation module connected to the user interface for reading a verification rule checklist in an external database as a verification basis in the future;

an application programming interface setup instruction module providing an application programming interface by which a circuit layout system is accessed;

a characteristic extraction module used to extract characteristics of the electronic component footprint;

a data processing module connected to the user interface, the application programming interface setup instruction module and the characteristic extraction module for operating the application programming interface as well as the characteristic extraction module and accessing characteristic data from the electronic component footprint; and

a component footprint verification module connected to the user interface for verification of the characteristic data according to the verification rule checklist and the display of a verification result on the user interface

2. An electronic component footprint verification system as claimed in claim 1 wherein the verification rule checklist comprises at least one of component footprint setup regulations, pin-out design rules, pin-to-pin spacing rules, assembly rules, silkscreen rules, DFA (Design For Assembly) bound rules, probe contact rules, place bound rules, body center rules, and footprint information rules.

3. An electronic component footprint verification system as claimed in claim 1 wherein the data processing module is used in normalization of the characteristic data.

4. An electronic component footprint verification system as claimed in claim 3 wherein the normalization is to transform the characteristic data to another format including, without limitation, JSON (JavaScript Object Notation) and XML (Extensible Markup Language).

5. An electronic component footprint verification system as claimed in claim 1 wherein the characteristic data further comprises at least one of pin-out information, geometric pattern information, and text description information of the corresponding electronic component footprint.

6. A method of an electronic component footprint verification system, comprising the following steps:

select an electronic component footprint which is to be verified and corresponds to file formats of a circuit layout system;

read a verification rule checklist in an external database as a verification basis in the future;

provide an application programming interface by which the circuit layout system is accessed;

characteristic data is extracted from the electronic component footprint through the application programming interface; and

the characteristic data is verified according to the verification rule checklist for display of a verification result.

7. A method of an electronic component footprint verification system as claimed in claim 6 wherein the verification rule checklist further comprises at least one of component footprint setup regulations, pin-out design rules, pin-to-pin spacing rules, assembly rules, silkscreen rules, DFA (Design For Assembly) bound rules, probe contact rules, place bound rules, body center rules, and footprint information rules.

8. A method of an electronic component footprint verification system as claimed in claim 6 for normalization of the characteristic data.

9. A method of an electronic component footprint verification system as claimed in claim 8 wherein the normalization is to transform the characteristic data to another format including, without limitation, JSON (JavaScript Object Notation) and XML (Extensible Markup Language).

10. A method of an electronic component footprint verification system as claimed in claim 6 wherein the characteristic data further comprises at least one of pin-out information, geometric pattern information, and text description information of the corresponding electronic component footprint.