STABLE DRIVING SCHEME FOR ACTIVE MATRIX DISPLAYS

• US 20190051248A1
• Filed: 10/15/2018
• Published: 02/14/2019
• Est. Priority Date: 04/19/2006
• Status: Active Grant

• Current Assignee: IGNIS Innovation Incorporated
• Original Assignee: IGNIS Innovation Incorporated
• Inventors: Nathan, Arokia, Chaji, Gholamreza
• Granted Patent: US 10,453,397 B2
• Time in Patent Office: Days
• CPC Class Codes: G09G 2300/0814 used for selection purposes, e.g. logical AND for partial update
• CPC Class Codes: G09G 2300/0819 used for counteracting undesired variations, e.g. feedback or autozeroing
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0866 by means of changes in the pixel supply voltage
• CPC Class Codes: G09G 2310/0254 Control of polarity reversal in general, other than for liquid crystal displays
• CPC Class Codes: G09G 2310/0256 with the purpose of reversing the voltage across a light emitting or modulating element within a pixel
• CPC Class Codes: G09G 2320/0233 Improving the luminance or brightness uniformity across the screen
• CPC Class Codes: G09G 2320/043 Preventing or counteracting the effects of ageing
• CPC Class Codes: G09G 3/3208 organic, e.g. using organic light-emitting diodes [OLED]
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: G09G 3/3258 with pixel circuitry controlling the voltage across the light-emitting element

Abstract

A method and system for operating a pixel array having at least one pixel circuit is provided. The method includes repeating an operation cycle defining a frame period for a pixel circuit, including at each frame period, programming the pixel circuit, driving the pixel circuit, and relaxing a stress effect on the pixel circuit, prior to a next frame period. The system includes a pixel array including a plurality of pixel circuits and a plurality of lines for operation of the plurality of pixel circuits. Each of the pixel circuits includes a light emitting device, a storage capacitor, and a drive circuit connected to the light emitting device and the storage capacitor. The system includes a drive for operating the plurality of lines to repeat an operation cycle having a frame period so that each of the operation cycle comprises a programming cycle, a driving cycle and a relaxing cycle for relaxing a stress on a pixel circuit, prior to a next frame period.

Claims

1-16. -16. (canceled)

17. A method of operating a pixel array having pixel circuits, each pixel circuit including a drive transistor and a light emitting device, and driven by repeating an operation cycle defining a frame period for each pixel circuit, the method comprising:

selecting a first pixel circuit during a first operation cycle of a frame period of the first pixel circuit; and

selecting a second pixel circuit during said selecting the first pixel circuit during a second operation cycle of a frame period of the second pixel circuit, the first operation cycle different from the second operation cycle.

18. The method of claim 17, wherein the first operation cycle comprises a first programming operation cycle and wherein the second operation cycle comprises a first relaxing operation cycle.

19. The method of claim 17, further comprising:

during said selecting the first pixel circuit and said selecting the second pixel circuit, providing first voltages to the first pixel circuit and second voltages to the second pixel circuit.

20. The method of claim 19, wherein the first voltages are sufficient to cause, during the first operation cycle of the frame period of the first pixel circuit, the drive transistor of the first pixel circuit to turn on and the light emitting device of the first pixel circuit to remain off.

21. The method of claim 19, wherein the second voltages are sufficient to cause, during the second operation cycle of the frame period of the second pixel circuit, the drive transistor of the second pixel circuit to turn off and the light emitting device of the second pixel circuit to turn off.

22. The method of claim 19, wherein the second voltages are sufficient to cause, during the second operation cycle of the frame period of the second pixel circuit, negative biasing of the transistor of the second pixel circuit.

23. The method of claim 19, wherein the first voltages and the second voltages each comprise a first voltage provided via a data line coupled to the first pixel circuit and the second pixel circuit, wherein the first voltages comprise a first supply voltage used to drive the light emitting device of the first pixel circuit, wherein the second voltages comprise a second supply voltage used to drive the light emitting device of the second pixel circuit, the first supply voltage different from the second supply voltage, and wherein a polarity of the first supply voltage is opposite in polarity to that of the first voltage.

24. The method of claim 19, wherein the first voltages and the second voltages each comprise a first voltage provided via a data line coupled to the first pixel circuit and the second pixel circuit, the method further comprising:

providing a second voltage to the first pixel circuit over the data line during a second operation cycle of the frame period of the first pixel circuit, the second voltage comprising at least a programming voltage for the first pixel circuit; and

deselecting the second pixel circuit during the second operation cycle of the frame period of the first pixel circuit isolating the second pixel circuit from the second voltage.

25. The method of claim 17, further comprising:

deselecting the second pixel circuit at the end of the second operation cycle of the frame period of the second pixel circuit.

26. The method of claim 19, wherein the first voltages comprise a first voltage provided over a data line coupled to the first pixel circuit and the second pixel circuit, the first voltage smaller than V_T0+V_OLED0 where V_T0 is a threshold voltage of the drive transistor of the first pixel circuit in an unstressed state and V_OLED0 is an on voltage of the light-emitting device of the first pixel circuit in an unstressed state.

27. A display system comprising:

a pixel array having pixel circuits, each pixel circuit including a drive transistor and a light emitting device;

a driver coupled to the pixel circuits and for driving the pixel circuits by repeating an operation cycle defining a frame period for each pixel circuit;

and a controller coupled to the driver, the controller operable to;

select a first pixel circuit during a first operation cycle of a frame period of the first pixel circuit; and

select a second pixel circuit during said selecting the first pixel circuit and during a second operation cycle of a frame period of the second pixel circuit, the first operation cycle different from the second operation cycle.

28. The display system of claim 27, wherein the first operation cycle comprises a first programming operation cycle and wherein the second operation cycle comprises a first relaxing operation cycle.

29. The display system of claim 27, wherein the controller is further operable to:

during selection of the first pixel circuit and selection of the second pixel circuit, provide first voltages to the first pixel circuit and second voltages to the second pixel circuit.

30. The display system of claim 29, wherein the first voltages are sufficient to cause, during the first operation cycle of the frame period of the first pixel circuit, the drive transistor of the first pixel circuit to turn on and the light emitting device of the first pixel circuit to remain off.

31. The display system of claim 29, wherein the second voltages are sufficient to cause, during the second operation cycle of the frame period of the second pixel circuit, the drive transistor of the second pixel circuit to turn off and the light emitting device of the second pixel circuit to turn off.

32. The display system of claim 29, wherein the second voltages are sufficient to cause, during the second operation cycle of the frame period of the second pixel circuit, negative biasing of the transistor of the second pixel circuit.

33. The display system of claim 29, wherein the first voltages and the second voltages each comprise a first voltage provided via a data line coupled to the first pixel circuit and the second pixel circuit, wherein the first voltages comprise a first supply voltage used to drive the light emitting device of the first pixel circuit, wherein the second voltages comprise a second supply voltage used to drive the light emitting device of the second pixel circuit, the first supply voltage different from the second supply voltage, and wherein a polarity of the first supply voltage is opposite in polarity to that of the first voltage.

34. The display system of claim 29, wherein the first voltages and the second voltages each comprise a first voltage provided via a data line coupled to the first pixel circuit and the second pixel circuit, wherein the controller is further operable to:

provide a second voltage to the first pixel circuit over the data line during a second operation cycle of the frame period of the first pixel circuit, the second voltage comprising at least a programming voltage for the first pixel circuit; and

deselect the second pixel circuit during the second operation cycle of the frame period of the first pixel circuit isolating the second pixel circuit from the second voltage.

35. The display system of claim 27, wherein the controller is further operable to:

deselect the second pixel circuit at the end of the second operation cycle of the frame period of the second pixel circuit.

36. The display system of claim 29, wherein the first voltages comprise a first voltage provided over a data line coupled to the first pixel circuit and the second pixel circuit, the first voltage smaller than V_T0+V_OLED0 where V_T0 is a threshold voltage of the drive transistor of the first pixel circuit in an unstressed state and V_OLED0 is an on voltage of the light-emitting device of the first pixel circuit in an unstressed state.