MAGNETIC MEMORY

• US 20190066749A1
• Filed: 10/31/2018
• Published: 02/28/2019
• Est. Priority Date: 12/16/2016
• Status: Active Grant

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: YODA, Hiroaki, SHIMOMURA, Naoharu, SAITO, Yoshiaki, OHSAWA, Yuichi, ABE, Keiko
• Granted Patent: US 10,643,682 B2
• Time in Patent Office: Days
• CPC Class Codes: G11C 11/16 using elements in which the storage effect is based on magnetic spin effect
• CPC Class Codes: G11C 11/161 details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
• CPC Class Codes: G11C 11/1653 Address circuits or decoders
• CPC Class Codes: G11C 11/1659 Cell access
• CPC Class Codes: G11C 11/1673 Reading or sensing circuits or methods
• CPC Class Codes: G11C 11/1675 Writing or programming circuits or methods

Abstract

A magnetic memory includes: first to third terminals; a conductive layer including first to fifth regions, the first region being electrically connected to the first terminal, the fifth region being electrically connected to the second terminal, and the third region being electrically connected to the third terminal; a first magnetoresistive element including a first magnetic layer, a second magnetic layer disposed between the second region and the first magnetic layer, and a first nonmagnetic layer disposed between the first and the second magnetic layer; a second magnetoresistive element including a third magnetic layer, a fourth magnetic layer disposed between the fourth region and the third magnetic layer, and a second nonmagnetic layer disposed between the third and the fourth magnetic layer; and a circuit flowing a write current between the first and the second terminal and between the second and the third terminal in a write operation.

Claims

1-22. -22. (canceled)

23. :

A magnetic memory comprising;

a first terminal, a second terminal, and a third terminal;

a first conductive layer including a first region, a second region, a third region, a fourth region, and a fifth region, the second region being between the first region and the fifth region, the third region being between the second region and the fifth region, the fourth region being between the third region and the fifth region, the first region being electrically connected to the first terminal, the fifth region being electrically connected to the second terminal, and the third region being electrically connected to the third terminal;

a first magnetoresistive element including a first magnetic layer, a second magnetic layer disposed between the second region and the first magnetic layer, and having a first magnetization direction, a first nonmagnetic layer disposed between the first magnetic layer and the second magnetic layer, and a fourth terminal electrically connected to the first magnetic layer;

a second magnetoresistive element including a third magnetic layer, a fourth magnetic layer disposed between the fourth region and the third magnetic layer, and having a second magnetization direction, a second nomnagnetic layer disposed between the third magnetic layer and the fourth magnetic layer, and a fifth terminal electrically connected to the third magnetic layer, the second magnetization direction being difTerent from the first magnetization direction; and

a circuit configured to flow a first write current from the third terminal to the first terminal and a second write current from the third terminal to the second terminal, or to flow a third write current from the first terminal to the third terminal and a fourth write current from the second terminal to the third terminal.

24. :

The magnetic memory according to claim 23, wherein the second magnetic layer has an in-plane magnetic anisotropy, the fourth magnetic layer has an in-plane magnetic anisotropy, an easy magnetization axis of the second magnetic layer is not parallel to a first direction, and an easy magnetization axis of the fourth magnetic layer is not parallel to the first direction, the first direction being a direction in which a write current flows, the write current flowing between the first terminal and the third terminal and between the second terminal and the third terminal.

25. :

The magnetic memory according to claim 23, wherein the first region, the second region, the third region, the fourth region, and the fifth region are arranged in line with a first direction, a second direction crosses with the first direction, a length of the first magnetoresistive element in the second direction and a length of the second magnetoresistive element in the second direction are equal to a length of the first conductive layer in the second direction.

26. :

The magnetic memory according to claim 23, wherein the circuit supplies a first potential to the fourth terminal and a second potential to the fifth terminal in the write operation, the first potential being equal to the second potential.

27. :

The magnetic memory according to claim 23, wherein the circuit supplies a voltage between the fourth terminal and the fifth terminal, and reads a data based on a potential of the third terminal.

28. :

The magnetic memory according to claim 23, wherein the third terminal is disposed on a first face of the first conductive layer, the first magnetoresistive element and the second magnetoresistive element are disposed on a second face of the first conductive layer, the first face being different from the second face.

29. :

The magnetic memory according to claim 28, further comprising a third magnetoresistive element disposed on the second face and the third region, the third magnetoresistive element including a fifth magnetic layer, a sixth magnetic layer disposed between the third region and the fifth magnetic layer, and a third nonmagnetic layer disposed between the fifth magnetic layer and the sixth magnetic layer.

30. :

The magnetic memory according to claim 28, further comprising a second conductive layer having a higher conductivity than the first conductive layer, the second conductive layer being disposed on the third region and on the second face.

31. :

The magnetic memory according to claim 23, wherein the third terminal is disposed on the third region and on a first face of the first conductive layer, and first magnetoresistive element and the second magnetoresistive element are disposed on the first face.

32. :

The magnetic memory according to claim 31, wherein at least one of the first terminal, the second terminal, and the third terminal includes a metal magnetic layer.

33. :

The magnetic memory according to claim 23, wherein the circuit flows a read current between the third terminal and the fourth terminal and between the third terminal and the fifth terminal, and reads a data on the basis of a potential difference or a current difference between the fourth terminal and the fifth terminal.

34. :

The magnetic memory according to claim 23, wherein the first terminal is electrically connected to the second terminal.

35. :

The magnetic memory according to claim 23, further comprising a magnetic field application device, wherein the second magnetic layer has a perpendicular magnetic anisotropy, the fourth magnetic layer has a perpendicular magnetic anisotropy, and the magnetic field application device applies a first magnetic field to the second magnetic layer and a second magnetic field to the fourth magnetic layer, the first magnetic field including a first component and the second magnetic field including a second component, the first component and the second component being different from a layer stacking direction of the first magnetoresistive element and the second magnetoresistive element.

36. :

A magnetic memory comprising;

a conductive layer including a first region, a second region, and a third region, the second region being disposed between the first region and the third region;

a magnetoresistive element including a first magnetic layer, a second magnetic layer disposed between the second region and the first magnetic layer, and a first nonmagnetic layer disposed between the first magnetic layer and the second magnetic layer;

a first electrode disposed on the first region and including a first face facing to the first region and a second face facing to the first face; and

a second electrode disposed on the third region and including a third face facing to the third region and a fourth face facing to the third face,

wherein the first electrode, the magnetoresistive element, and the second electrode are arranged in line with a first direction, a length of the second magnetic layer in the first direction is longer than a length of the first magnetic layer in the first direction, a length of the second face in the first direction is longer than a length of the first face in the first direction, and a length of the fourth face in the first direction is longer a length of the third face in the first direction.

37. :

The magnetic memory according to claim 36, further comprising;

a first insulator disposed between the first electrode and the magnetoresistive element, and a second insulator disposed between the magnetoresistive element and the second electrode.

38. :

The magnetic memory according to claim 37, wherein the first insulator is in contact with the first electrode and the magnetoresistive element, and a second insulator is in contact with the magnetoresistive element and the second electrode.

39. :

A magnetic memory comprising;

a first conductive layer including a first region and a second region;

a second conductive layer separating from the first conductive layer and including a third region and a fourth region, the first region, the second region, the third region, and the fourth region being arranged in line with a first direction;

a first magnetoresistive element including a first magnetic layer, a second magnetic layer disposed between the second region and the first magnetic layer, and a first nonmagnetic layer disposed between the first magnetic layer and the second magnetic layer;

a second magnetoresistive element including a third magnetic layer, a fourth magnetic layer disposed between the third region and the third magnetic layer, and a second nonmagnetic layer disposed between the third magnetic layer and the fourth magnetic layer;

a first electrode disposed on the first region;

a second electrode disposed on the fourth region;

a third electrode disposed between the second region and the third region, the third electrode being electrically connected to the second region and the third region; and

a fourth electrode disposed between the second region and the third region, the fourth electrode being electrically connected to the third electrode, the fourth electrode being disposed on a side different from a side on which the third electrode is disposed.

40. :

The magnetic memory according to claim 39, further comprising;

a first insulator disposed between the first electrode and the magnetoresistive element, a second insulator disposed between the magnetoresistive element and the third electrode, a third insulator disposed between the third electrode and the second magnetoresistive element, and a fourth insulator disposed between the second magnetoresistive element and the second electrode.

41. :

The magnetic memory according to claim 40, wherein the first insulator is in contact with the first electrode and the magnetoresistive element, the second insulator is in contact with the magnetoresistive element and the third electrode, the third insulator is in contact with the third electrode and the second magnetoresistive element, and the fourth insulator is in contact with the second magnetoresistive element and the second electrode.

42. :

The magnetic memory according to claim 39, further comprising a third conductive layer disposed between the third electrode and the fourth electrode, the third conductive layer being separated from the first electrode and the second electrode.