SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
First Claim
1. A method for manufacturing a semiconductor device, the method comprising:
- forming a gate structure over a channel layer and an isolation insulating layer;
forming a first sidewall spacer layer on a side surface of the gate structure;
forming a sacrificial layer so that an upper portion of the gate structure with the first sidewall spacer layer is exposed from the sacrificial layer and a bottom portion of the gate structure with the first sidewall spacer layer is embedded in the first sacrificial layer;
forming a space between the bottom portion of the gate structure and the sacrificial layer by removing at least part of the first sidewall spacer layer; and
after the first sidewall spacer layer is removed, forming an air gap between the bottom portion of the gate structure and the sacrificial layer by forming a second sidewall spacer layer over the gate structure.
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Accused Products
Abstract
In a method for manufacturing a semiconductor device, a gate structure is formed over a channel layer and an isolation insulating layer. A first sidewall spacer layer is formed on a side surface of the gate structure. A sacrificial layer is formed so that an upper portion of the gate structure with the first sidewall spacer layer is exposed from the sacrificial layer and a bottom portion of the gate structure with the first sidewall spacer layer is embedded in the first sacrificial layer. A space is formed between the bottom portion of the gate structure and the sacrificial layer by removing at least part of the first sidewall spacer layer. After the first sidewall spacer layer is removed, an air gap is formed between the bottom portion of the gate structure and the sacrificial layer by forming a second sidewall spacer layer over the gate structure.
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Citations
21 Claims
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1. A method for manufacturing a semiconductor device, the method comprising:
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forming a gate structure over a channel layer and an isolation insulating layer; forming a first sidewall spacer layer on a side surface of the gate structure; forming a sacrificial layer so that an upper portion of the gate structure with the first sidewall spacer layer is exposed from the sacrificial layer and a bottom portion of the gate structure with the first sidewall spacer layer is embedded in the first sacrificial layer; forming a space between the bottom portion of the gate structure and the sacrificial layer by removing at least part of the first sidewall spacer layer; and after the first sidewall spacer layer is removed, forming an air gap between the bottom portion of the gate structure and the sacrificial layer by forming a second sidewall spacer layer over the gate structure. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method for manufacturing a semiconductor device, the method comprising:
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forming a gate structure over a channel layer of a fin structure and an isolation insulating layer; forming a first sidewall spacer layer on a side surface of the gate structure, the first sidewall spacer layer including a main layer; forming a liner layer over the first sidewall spacer layer, forming a sacrificial layer so that an upper portion of the gate structure with the first sidewall spacer layer and the liner layer is exposed from the sacrificial layer and a bottom portion of the gate structure with the first sidewall spacer layer and the liner layer is embedded in the first sacrificial layer; forming a space between the bottom portion of the gate structure and the liner layer by removing the main layer of the first sidewall spacer layer; and after the first sidewall spacer layer is removed, forming an air gap between the bottom portion of the gate structure and the liner layer by forming a second sidewall spacer layer. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
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20. (canceled)
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21. A method for manufacturing a semiconductor device, the method comprising:
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forming a gate structure over a channel layer of a fin structure and an isolation insulating layer; forming a source epitaxial layer and a drain epitaxial layer over the fin structure not covered by the gate structure; forming a first sidewall spacer layer on a side surface of the gate structure; forming a sacrificial layer so that an upper portion of the gate structure with the first sidewall spacer layer is exposed from the sacrificial layer and a bottom portion of the gate structure with the first sidewall spacer layer and the source and drain epitaxial layers are embedded in the first sacrificial layer; forming a space between the bottom portion of the gate structure and the sacrificial layer by removing at least part of the first sidewall spacer layer, such that a part of an upper surface of the isolation insulating layer is exposed to the space; and after the first sidewall spacer layer is removed, forming an air gap between the bottom portion of the gate structure and the sacrificial layer by forming a second sidewall spacer layer over the gate structure.
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Specification