METHOD FOR DRIVING A TRANSISTOR DEVICE WITH NON-ISOLATED GATE, DRIVE CIRCUIT AND ELECTRONIC CIRCUIT

• US 20190068173A1
• Filed: 07/27/2018
• Published: 02/28/2019
• Est. Priority Date: 08/25/2017
• Status: Active Grant

• Current Assignee: Infineon Technologies Austria Ag (Infineon Technologies AG)
• Original Assignee: Infineon Technologies Austria Ag (Infineon Technologies AG)
• Inventors: Zojer, Bernhard
• Granted Patent: US 10,454,456 B2
• Time in Patent Office: Days
• CPC Class Codes: H03K 17/063 in field-effect transistor switches
• CPC Class Codes: H03K 17/567 Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT
• CPC Class Codes: H03K 3/012 Modifications of generator to improve response time or to decrease power consumption

Abstract

Disclosed is a method for driving a transistor device and an electronic circuit that includes a transistor device. The method includes driving the transistor device based on a drive signal such that the transistor device is driven in an on-state when the drive signal has an on-level and an off-state when the drive signal has an off-level. Driving the transistor device in the off-state includes: operating the transistor device in a first off-state after the drive signal changes from the on-level to the off-level; after the first off-state, operating the transistor device in a second off-state different from the first off-state; and after the second off-state, operating the transistor device in a third off-state different from the second off-state if the off-level of the drive signal prevails longer than a predefined maximum time period.

Claims

1. A method, comprising:

driving a transistor device based on a drive signal such that the transistor device is driven in an on-state when the drive signal has an on-level and an off-state when the drive signal has an off-level,

wherein driving the transistor device in the off-state comprises;

operating the transistor device in a first off-state after the drive signal changes from the on-level to the off-level,

after the first off-state, operating the transistor device in a second off-state different from the first off-state, and

after the second off-state, operating the transistor device in a third off-state different from the second off-state if the off-level of the drive signal prevails longer than a predefined maximum time period.

2. The method of claim 1,

wherein operating the transistor device in the first off-state comprises operating the transistor device in the first off-state for a predefined first time period.

3. The method of claim 1,

wherein driving the transistor device in the first off-state comprises driving the transistor with a first drive voltage,

wherein driving the transistor device in the second off-state comprises driving the transistor with a second drive voltage, and

wherein the second off-state being different from the first off-state comprises that the second drive voltage is different from the first drive voltage.

4. The method of claim 3,

wherein driving the transistor device in the third off-state comprises driving the transistor with a third drive voltage, and

wherein the third off-state being different from the second off-state comprises that the third drive voltage is different from the second drive voltage.

5. The method of claim 4,

wherein a difference between a threshold voltage of the transistor device and the first drive voltage is greater than a difference between the threshold voltage and the second drive voltage, and

wherein a difference between a threshold voltage of the transistor device and the third drive voltage is greater than a difference between the threshold voltage and the second drive voltage

6. The method of claim 2, wherein the second drive voltage is substantially zero.

7. The method of claim 1,

wherein operating the transistor device in the on-state comprises connecting a series circuit with a voltage source and an RC circuit between a control node and a first load node of the transistor device,

wherein operating the transistor device in the first off-state comprises connecting the RC circuit between the control node and the first load node of the transistor device, and

wherein operating the transistor device in the second off-state comprises connecting the control node and the first load node of the transistor device.

8. The method of claim 7,

wherein operating the transistor device in the third off-state comprises connecting the voltage source between the control node and the gate node such that the drive voltage in the on-state and the drive voltage in the third off-state have opposite polarities.

9. The method of claim 1, wherein the transistor device is a high electron mobility transistor (HEMT).

10. The method of claim 1, the method further comprising:

in an electronic circuit that includes the transistor device and an electronic switch, operating the electronic switch in a plurality of successive drive cycles such that in each drive cycle it operates in an on-state and, after the on-state, in an off-state, and operating the transistor device such that the electronic switch and the transistor device are operated in the on-state alternately.

11. The method of claim 10, further comprising:

a first dead time between the on-state of the electronic switch and the on-state of the transistor device and a second dead time between the on-state of the transistor device and the on-state of the electronic switch, and

wherein a duration of the first time period is selected from between 1.1 times and 2 times a duration of the second dead time.

12. The method of claim 10,

wherein operating the electronic switch comprises operating the electronic switch at a switching frequency selected from between a minimum switching frequency and a maximum switching frequency, and

wherein a duration of the maximum time period is greater than a reciprocal of the minimum switching frequency.

13. The method of claim 12, wherein the duration of the maximum time period is greater than 3 times a reciprocal of the minimum switching frequency.

14. A drive circuit configured to drive a transistor device based on a drive signal such that the transistor device is driven in an on-state when the drive signal has an on-level and an off-state when the drive signal has an off-level, wherein in the off-state the drive circuit is configured to drive the transistor device

in a first off-state after the drive signal changes from the on-level to the off-level,

after the first off-state, in a second off-state different from the first off-state, and

after the second off-state, in a third off-state different from the second off-state if the off-level of the drive signal prevails longer than a predefined maximum time period.

15. The drive circuit of claim 14,

wherein the drive circuit is configured to operate the transistor device in the first off-state for a predefined first time period.

16. The drive circuit of claim 14,

wherein the drive circuit is configured to drive the transistor device in the first off-state with a first drive voltage,

wherein the drive circuit is configured to drive the transistor device in the second off-state with a second drive voltage, and

wherein the second off-state being different from the first off-state comprises that the second drive voltage is different from the first drive voltage.

17. The drive circuit of claim 16,

wherein the drive circuit is configured to drive the transistor device in the third off-state with a third drive voltage, and

wherein the third off-state being different from the second off-state comprises that the third drive voltage is different from the second drive voltage.

18. The drive circuit of claim 17,

wherein a difference between a threshold voltage of the transistor device and the first drive voltage is greater than a difference between the threshold voltage and the second drive voltage, and

wherein a difference between a threshold voltage of the transistor device and the third drive voltage is greater than a difference between the threshold voltage and the second drive voltage

19. The drive circuit of any one of claim 16, wherein the second drive voltage is substantially zero.

20. The drive circuit of claim 15,

wherein the drive circuit comprises an RC circuit and is configured

to operate the transistor device in the on-state by connecting a series circuit with a voltage source and the RC circuit between a control node and a first load node of the transistor device,

to operate the transistor device in the first off-state by connecting the RC circuit between the control node and the first load node of the transistor device, and

to operate the transistor device in the second off-state by connecting the control node and the first load node of the transistor device.

21. The drive circuit of claim 20, further configured to operate the transistor device in the third off-state by connecting the voltage source between the control node and the gate node such that the drive voltage in the on-state and the drive voltage in the third off-state have opposite polarities.

22. The drive circuit of claim 20, wherein the RC circuit comprises:

a series circuit with a capacitor and a first resistor, and

a second resistor connected in parallel with the series circuit.

23. The drive circuit of claim 22, wherein a resistance of the second resistor is between 50 times and 200 times a resistance of the first resistor.

25. The electronic circuit of claim 23, wherein the transistor device is a high electron mobility transistor (HEMT).

24. An electronic circuit, comprising:

a transistor device; and

a drive circuit configured to drive the transistor device based on a drive signal such that the transistor device is driven in an on-state when the drive signal has an on-level and an off-state when the drive signal has an off-level, wherein in the off-state the drive circuit is configured to drive the transistor device

in a first off-state after the drive signal changes from the on-level to the off-level,

after the first off-state, in a second off-state different from the first off-state, and

after the second off-state, in a third off-state different from the second off-state if the off-level of the drive signal prevails longer than a predefined maximum time period.