LEVEL SHIFTER CIRCUIT, CORRESPONDING DEVICE AND METHOD

• US 20190068194A1
• Filed: 08/27/2018
• Published: 02/28/2019
• Est. Priority Date: 08/29/2017
• Status: Active Grant

• Current Assignee: STMicroelectronics SRL (STMicroelectronics NV)
• Original Assignee: STMicroelectronics SRL (STMicroelectronics NV)
• Inventors: ALESSANDRO, Agatino Antonino, MIRABELLA, Ignazio Bruno
• Granted Patent: US 10,447,268 B2
• Time in Patent Office: Days
• CPC Class Codes: H03K 19/0013 in field effect transistor circuits
• CPC Class Codes: H03K 19/00338 In field effect transistor circuits
• CPC Class Codes: H03K 19/018507 Interface arrangements
• CPC Class Codes: H03K 19/20 characterised by logic function, e.g. AND, OR, NOR, NOT circuits H03K19/003 - H03K19/01 take precedence
• CPC Class Codes: H03K 3/012 Modifications of generator to improve response time or to decrease power consumption
• CPC Class Codes: H03K 3/037 Bistable circuits
• CPC Class Codes: H03K 3/35613 the input circuit having a differential configuration
• CPC Class Codes: H03K 3/356182 with additional means for controlling the main nodes
• CPC Class Codes: H03K 3/3562 of the master-slave type

Abstract

A level-shifter circuit operates to shift an input signal referenced to a first set supply voltages to generate an output signal referenced to a second set of supply voltages. The output signal from the level-shifter circuit is latched by a latching circuit. A logic gate has a first input configured to receive the input signal, a second input configured to receive a feedback signal and an output coupled to a input of the level shifting circuit. A feedback circuit has a first input configured to receive the output signal, a second input configured to receive the input signal and an output configured to generate the feedback signal. The feedback circuit operates to sense an uncontrolled switching event of the output signal occurring in the absence of a switching of the input signal and apply, in response thereto, the feedback signal to cancel the uncontrolled switching event.

Claims

1. A circuit, including:

a first circuit powered from a first set of a supply node and a ground, the first circuit including at least one first switching element configured for receiving a switching input signal,

a second circuit powered from a second set of a supply node and a ground, wherein the second circuit section includes;

i) at least one second switching element coupled to the at least one first switching element in the first circuit section, the at least one second switching element in the second circuit section configured for switching as a result of switching of the at least one first switching element in the first circuit section, and

ii) a latch circuit block driven by the at least one second switching element and having at least one latch output, wherein switching of the at least one latch output is controlled by switching of the at least one second switching element in the second circuit section to provide at least one latch output level-shifted replica of the switching input signal applied to the at least one first switching element in the first circuit section, and

a feedback network between the at least one latch output and the at least one first switching element in the first circuit section, the feedback network configured for sensing uncontrolled switching events of the at least one latch output occurring in the absence of switching of at least one first switching element in the first circuit section and for applying to the at least one first switching element in the first circuit section a forced switching signal to cancel out the uncontrolled switching events at the at least one latch output.

2. The circuit of claim 1, wherein the feedback network includes at least one network branch including:

a first transistor and a second transistor arranged with their currents paths in series, the first transistor and the second transistor having control terminals coupled to the at least one latch output and the at least one first switching element to sense said level-shifted replica and said switching input signal, respectively, and

a current sensor sensitive to the current through the current paths of first transistor and the second transistor, the current sensor coupled to the at least one first switching element in the first circuit section to apply thereto said forced switching signal to cancel out the uncontrolled switching events at the at least one latch output.

3. The circuit of claim 2, wherein the at least one network branch in the feedback network is set between:

the supply node in the second set of a supply node and a ground, and

the ground in the first set of a supply node and a ground.

4. The circuit of claim 2, wherein the current sensor includes a resistor traversed by the current through the current paths of the first transistor and the second transistor.

5. The circuit of claim 1, including at least one logic gate driving the at least one first switching element in the first circuit section, the at least one logic gate having:

a first input for receiving said switching input signal, and

a second input coupled to the feedback network and configured for receiving therefrom said forced switching signal.

6. The circuit of claim 5, wherein the at least one logic gate includes an AND gate having:

a first input for receiving said switching input signal, and

a second input coupled to the feedback network and configured for receiving therefrom said forced switching signal.

7. The circuit of any claim 1, wherein:

the first circuit includes a pair of said first switching elements configured for receiving a pair of complementary switching input signals,

the second circuit includes a pair of said second switching elements respectively coupled to the pair of first switching elements in the first circuit section, the second switching elements in the second circuit configured for switching as a result of switching of the respective first switching elements in the first circuit,

the latch circuit block includes a pair of complementary latch outputs, wherein switching of the latch outputs is controlled by switching of respective second switching elements to provide at the latch outputs level-shifted replicas of switching input signals applied to the first switching elements in the first circuit section, and

the feedback network is configured for sensing uncontrolled switching events of the latch outputs occurring in the absence of switching of the respective first switching elements in the first circuit section and for applying to the first switching elements in the first circuit section forced switching signals to cancel out the uncontrolled switching events at the latch outputs.

8. The circuit of claim 1, further comprising a user circuit coupled to said latch circuit block to receive therefrom said level-shifted replicas of switching input signals applied to the at least one first switching element in the first circuit section.

9. The circuit of claim 8, forming a radiation-hardened integrated circuit device.

10. A circuit, comprising:

a level shifting circuit configured to shift an input signal referenced to a first set of a supply node and a ground to generate an output signal referenced to a second set of a supply node and a ground and latched by a latching circuit;

a logic gate having a first input configured to receive the input signal, a second input configured to receive a feedback signal and an output coupled to a input of the level shifting circuit; and

a feedback circuit having a first input configured to receive the output signal, a second input configured to receive the input signal and an output configured to generate the feedback signal, wherein the feedback circuit operates to sense an uncontrolled switching event of the output signal occurring in the absence of a switching of the input signal and apply, in response thereto, the feedback signal to cancel the uncontrolled switching event.

11. The circuit of claim 10, wherein the feedback circuit comprises:

a first transistor and a second transistor having current paths coupled in series, wherein a control terminal of the first transistor is configured to receive the output signal and wherein a control terminal of the second transistor is configured to receive the input signal; and

a current sensor configured to sense current flow through the current paths of first transistor and the second transistor and generate said feedback signal in response to the sensed current flow.

12. The circuit of claim 11, wherein the first and second transistors coupled in series are coupled between the supply node in the second set and the ground in the first set.

13. The circuit of claim 11, wherein the current sensor is a resistor traversed by the current flow through the current paths of the first transistor and the second transistor.

14. The circuit of claim 10, wherein the logic gate is an AND gate.