ARRAY SUBSTRATE, DISPLAY PANEL, DISPLAY APPARATUS, AND FABRICATING METHOD THEREOF

• US 20190072828A1
• Filed: 03/30/2017
• Published: 03/07/2019
• Est. Priority Date: 03/30/2017
• Status: Active Grant

• Current Assignee: BOE Technology Group Co., Ltd., Hefei Xinsheng Optoelectric Technology Co. Ltd. (BOE Technology Group Co., Ltd.)
• Original Assignee: BOE Technology Group Co., Ltd., Hefei Xinsheng Optoelectronics Technology Company Limited
• Inventors: Jiang, Liangliang, Wang, Haiyang, Guo, Lei, Yoon, Yongjun
• Granted Patent: US 10,444,580 B2
• Time in Patent Office: Days
• CPC Class Codes: G02F 1/133512 Light shielding layers, e.g. black matrix G02F1/136209 takes precedence
• CPC Class Codes: G02F 1/133528 Polarisers
• CPC Class Codes: G02F 1/133567 on the back side
• CPC Class Codes: G02F 1/136209 Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G02F 1/13685 Top gates
• CPC Class Codes: G02F 2202/36 Micro- or nanomaterials
• CPC Class Codes: H01L 29/78633 with a light shield
• CPC Class Codes: H10K 59/126 Shielding, e.g. light-blocking means over the TFTs

Abstract

The present application discloses a thin film transistor including a base substrate; an active layer; and a first linear polarization block configured to shield at least a portion of the active layer from light. A projection of the first linear polarization block on the base substrate at least partially overlaps with that of the active layer.

Claims

1. A thin film transistor, comprising:

a base substrate;

an active layer; and

a first linear polarization block configured to shield at least a portion of the active layer from light;

wherein a projection of the first linear polarization block on the base substrate at least partially overlaps with that of the active layer.

2. The thin film transistor of claim 1, wherein the first linear polarization block is made of a nano-linear polarization material.

4. The thin film transistor of claim 1, further comprising a gate electrode on a side of the active layer distal to the first linear polarization block;

wherein the projection of the first linear polarization block on the base substrate substantially overlaps with that of the gate electrode.

5. The thin film transistor of claim 1, further comprising a buffer layer between the first linear polarization block and the active layer.

6. The thin film transistor of claim 1, wherein the active layer is on a side of the first linear polarization block distal to the base substrate;

and

the first linear polarization block is configured to shield at least a portion of the active layer from light of a back light.

7. The thin film transistor of claim 1, further comprising:

a second linear polarization block corresponding to the first linear polarization block;

wherein a projection of the second linear polarization block on the base substrate at least partially overlaps with that of the active layer;

the first linear polarization block has a first transmission axis; and

the second linear polarization block has a second transmission axis substantially perpendicular to the first transmission axis.

8. The thin film transistor of claim 7, wherein the active layer is on a side of one of the first linear polarization block and the second linear polarization block proximal to the base substrate;

and

the first linear polarization block and the second linear polarization block are configured to shield at least a portion of the active layer from light emitted from a light emitting layer.

9. The thin film transistor of claim 2, wherein the nano-linear polarization material comprises a compound selected from the group consisting of magnesium fluoride (MgF₂), zinc oxide (ZnO), titanium oxide (TiO₂), indium tin oxide (ITO), indium zinc oxide (IZO), aluminum zinc oxide (AZO), magnesium zinc oxide (MZO), gallium zinc oxide (GZO), ruthenium oxide (RuO_x), iridium oxide (IrO_x), aluminum oxide (Al₂O₃), silicon oxide (SiO₂), silicon on glass, and silicon nitride (Si₃N₄).

10. The thin film transistor of claim 1, wherein the first linear polarization block is made of a non-metal material.

3. (canceled)

11. An array substrate, comprising:

a base substrate;

a plurality of thin film transistors on the base substrate, each of which comprising an active layer; and

a first linear polarization layer comprising a plurality of first linear polarization blocks, each of which configured to shield at least a portion of the active layer from light;

wherein a projection of one of the plurality of first linear polarization blocks on the base substrate at least partially overlaps with that of the active layer.

12. The array substrate of claim 11, wherein the first linear polarization layer is made of a nano-linear polarization material.

15. The array substrate of claim 11, wherein each of the plurality of thin film transistors further comprises a gate electrode on a side of the active layer distal to the one of the plurality of first linear polarization blocks;

and

the projection of the one of the plurality of first linear polarization blocks on the base substrate substantially overlaps with that of the gate electrode.

16. The array substrate of claim 11, further comprising a buffer layer between the first linear polarization layer and the active layer.

17. The array substrate of claim 12, wherein the nano-linear polarization material comprises a compound selected from the group consisting of magnesium fluoride (MgF₂), zinc oxide (ZnO), titanium oxide (TiO₂), indium tin oxide (ITO), indium zinc oxide (IZO), aluminum zinc oxide (AZO), magnesium zinc oxide (MZO), gallium zinc oxide (GZO), ruthenium oxide (RuO_x), iridium oxide (IrO_x), aluminum oxide (Al₂O₃), silicon oxide (SiO₂), silicon on glass, and silicon nitride (Si₃N₄).

18. The array substrate of claim 12, wherein the first linear polarization block is made of a non-metal material.

19. The array substrate of claim 11, wherein the active layer is on a side of one of the plurality of first linear polarization blocks distal to the base substrate;

and

each of the plurality of first linear polarization blocks is configured to shield at least a portion of the active layer from light of a back light.

20. The array substrate of claim 11, further comprising:

a second linear polarization layer comprising a plurality of second linear polarization blocks respectively corresponding to the plurality of first linear polarization blocks;

wherein a projection of the one of the plurality of second linear polarization blocks on the base substrate at least partially overlaps with that of the active layer;

each of the plurality of first linear polarization blocks has a first transmission axis; and

each of the plurality of second linear polarization blocks has a second transmission axis substantially perpendicular to the first transmission axis.

21. The array substrate of claim 20, wherein the active layer is on a side of one of the plurality of first linear polarization blocks and one of the plurality of second linear polarization blocks proximal to the base substrate;

and

the one of the plurality of first linear polarization blocks and the one of the plurality of second linear polarization blocks are configured to shield at least a portion of the active layer from light emitted from a light emitting layer.

22. A display panel, comprising the array substrate of claim 11.

13. (canceled)

14. (canceled)

23. (canceled)

24. A liquid crystal display apparatus, comprising:

an array substrate;

a counter substrate facing the array substrate; and

a lower polarizer on the array substrate;

wherein the array substrate comprises;

a base substrate;

a linear polarization layer on the base substrate, comprising a plurality of linear polarization blocks; and

a plurality of thin film transistors, each of which comprising an active layer on a side of one of the plurality of linear polarization blocks distal to the base substrate; and

wherein a projection of the one of the plurality of linear polarization blocks on the base substrate at least partially overlaps with that of the active layer; and

each of the plurality of linear polarization blocks has a first transmission axis; and

the lower polarizer on the array substrate has a third transmission axis substantially perpendicular to the first transmission axis.

25-35. -35. (canceled)