METHOD AND SYSTEM FOR ACTIVE PERSISTENT STORAGE VIA A MEMORY BUS

• US 20190073132A1
• Filed: 09/05/2017
• Published: 03/07/2019
• Est. Priority Date: 09/05/2017
• Status: Abandoned Application

• Current Assignee: Alibaba Group Holding Ltd.
• Original Assignee: Alibaba Group Holding Ltd.
• Inventors: Zhou, Ping, Li, Shu
• Application Number:
  US15/696,027
• Publication Number:
  US 20190073132A1
• Time in Patent Office: Days
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/0638 Combination of memories, e.g. ROM and RAM such as to permit replacement or supplementing of words in one module by words in another module address formation of the next microinstruction G06F9/26; masking faults in memories by using spares or by reconfiguring G11C29/70
• CPC Class Codes: G06F 2212/7208 Multiple device management, e.g. distributing data over multiple flash devices
• CPC Class Codes: G06F 3/0608 Saving storage space on storage systems
• CPC Class Codes: G06F 3/0641 De-duplication techniques
• CPC Class Codes: G06F 3/065 Replication mechanisms
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0688 Non-volatile semiconductor memory arrays

Abstract

One embodiment facilitates an active persistent memory. During operation, the system receives, by a non-volatile memory of a storage device via a memory bus, a command to manipulate data on the non-volatile memory, wherein the memory bus is connected to a volatile memory. The system executes, by a controller of the non-volatile memory, the command.

Claims

1. A computer-implemented method for facilitating an active persistent memory, the method comprising:

receiving, by a non-volatile memory of a storage device via a memory bus, a command to manipulate data on the non-volatile memory, wherein the memory bus is connected to a volatile memory; and

executing, by a controller of the non-volatile memory, the command.

2. The method of claim 1, wherein the command is received by the controller, and wherein the method further comprises:

receiving, by the controller, a request for a status of the executed command; and

generating, by the controller, a response to the request for the status based on whether the command has completed.

3. The method of claim 2, wherein the request for the status is received from the central processing unit, and

wherein executing the command, by the controller, causes the central processing unit to continue performing operations which do not involve manipulating the data on the non-volatile memory.

4. The method of claim 1, wherein the command to manipulate the data on the non-volatile memory indicates one or more of:

a command to copy data from a source address to a destination address;

a command to fill a region of the non-volatile memory with a first value;

a command to scan a region of the non-volatile memory for a second value, and, in response to determining an offset, return the offset; and

a command to add or subtract a third value to or from each word in a region of the non-volatile memory.

5. The method of claim 1, wherein the command to manipulate the data on the non-volatile memory includes one or more of:

an operation code which identifies the command; and

a parameter specific to the command.

6. The method of claim 5, wherein the parameter includes one or more of:

a source address;

a destination address;

a starting address;

an ending address;

a length of the data to be manipulated; and

a value associated with the command.

7. The method of claim 6, wherein the source address is a logical block address associated with the data to be manipulated, and

wherein the destination address is a physical block address of the non-volatile memory.

8. A computer system for facilitating an active persistent memory, the system comprising:

a processor; and

a memory coupled to the processor and storing instructions, which when executed by the processor cause the processor to perform a method, the method comprising;

receiving, by a non-volatile memory of the computer system via a memory bus, a command to manipulate data on the non-volatile memory, wherein the memory bus is connected to a volatile memory; and

executing, by a controller of the non-volatile memory, the command.

9. The computer system of claim 8, wherein the command is received by the controller, and wherein the method further comprises:

receiving, by the controller, a request for a status of the executed command; and

generating, by the controller, a response to the request for the status based on whether the command has completed.

10. The computer system of claim 9, wherein the request for the status is received from the central processing unit, and

wherein executing the command, by the controller, causes the central processing unit to continue performing operations which do not involve manipulating the data on the non-volatile memory.

11. The computer system of claim 8, wherein the command to manipulate the data on the non-volatile memory indicates one or more of:

a command to copy data from a source address to a destination address;

a command to fill a region of the non-volatile memory with a first value;

a command to scan a region of the non-volatile memory for a second value, and, in response to determining an offset, return the offset; and

a command to add or subtract a third value to or from each word in a region of the non-volatile memory.

12. The computer system of claim 8, wherein the command to manipulate the data on the non-volatile memory includes one or more of:

an operation code which identifies the command; and

a parameter specific to the command.

13. The computer system of claim 12, wherein the parameter includes one or more of:

a source address;

a destination address;

a starting address;

an ending address;

a length of the data to be manipulated; and

a value associated with the command.

14. The computer system of claim 13, wherein the source address is a logical block address associated with the data to be manipulated, and

wherein the destination address is a physical block address of the non-volatile memory.

15. A non-volatile memory, comprising:

a controller configured to receive, via a memory bus, a command to manipulate data on the non-volatile memory, wherein the memory bus is connected to a volatile memory; and

wherein the controller is further configured to execute the command.

16. The non-volatile memory of claim 15, wherein the controller is further configured to:

receive a request for a status of the executed command; and

generate a response to the request for the status based on whether the command has completed.

17. The non-volatile memory of claim 16, wherein the request for the status is received from the central processing unit, and

wherein executing the command, by the controller, causes the central processing unit to continue performing operations which do not involve manipulating the data on the non-volatile memory.

18. The non-volatile memory of claim 15, wherein the command to manipulate the data on the non-volatile memory indicates one or more of:

a command to copy data from a source address to a destination address;

a command to fill a region of the non-volatile memory with a first value;

a command to scan a region of the non-volatile memory for a second value, and, in response to determining an offset, return the offset; and

a command to add or subtract a third value to or from each word in a region of the non-volatile memory.

19. The non-volatile memory of claim 15, wherein the command to manipulate the data on the non-volatile memory includes one or more of:

an operation code which identifies the command; and

a parameter specific to the command.

20. The non-volatile memory of claim 19, wherein the parameter includes one or more of:

a source address;

a destination address;

a starting address;

an ending address;

a length of the data to be manipulated; and

a value associated with the command.