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Method of Mask Simulation Model for OPC and Mask Making

  • US 20190094680A1
  • Filed: 11/15/2017
  • Published: 03/28/2019
  • Est. Priority Date: 09/28/2017
  • Status: Active Grant
First Claim
Patent Images

1. An integrated circuit (IC) method comprising:

  • building a mask model to simulate a mask image and a compound lithography computational (CLC) model to simulate a wafer pattern;

    calibrating the mask model using a measured mask image;

    calibrating the compound lithography computational model using a measured wafer data and the calibrated mask model; and

    performing an optical proximity correction (OPC) process to an IC pattern using the calibrated compound computational model, thereby generating a mask pattern for mask fabrication.

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