DIELECTRIC ISOLATION IN GATE-ALL-AROUND DEVICES
First Claim
1. A semiconductor device comprising:
- a first layer comprising a first sacrificial material, wherein the first layer is deposited, over a surface of a substrate;
a first set of layers of a second sacrificial material and a second set of layers of a channel material deposited over the first layer;
a liner deposited in a first recess, wherein the first recess exposes a first connection end of a layer in the second set, wherein the first recess reaches into the substrate for at least a fraction of a total depth of the substrate;
an insulator material filling the first recess,wherein etching is performed on the insulator material up to a stop depth, wherein the stop depth stops the etching at a height above the surface of the substrate,wherein the liner is removed from at least the first connection end of the layer in the second set; and
an electrical connection formed with a source/drain structure using the first connection end of the layer in the second set, wherein a remaining portion of the insulator below the height and a remaining portion of the liner in the first recess increases impedance in a path of a substrate current from the source/drain structure to the substrate.
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Accused Products
Abstract
A semiconductor device is fabricated with a first layer of a first sacrificial material deposited over a surface of a substrate. A first set of layers of a second sacrificial material and a second set of layers of a channel material are deposited over the first layer. A liner is deposited in a first recess, which exposes a first connection end of a layer in the second set, where the first recess reaches into the substrate for at least a fraction of a total depth of the substrate. An insulator material is filled in the first recess and etched up to a stop depth, stopping the etching at a height above the surface of the substrate. The liner is removed from at least the first connection end of the layer in the second set. An electrical connection is formed with a source/drain structure using the first connection end.
10 Citations
20 Claims
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1. A semiconductor device comprising:
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a first layer comprising a first sacrificial material, wherein the first layer is deposited, over a surface of a substrate; a first set of layers of a second sacrificial material and a second set of layers of a channel material deposited over the first layer; a liner deposited in a first recess, wherein the first recess exposes a first connection end of a layer in the second set, wherein the first recess reaches into the substrate for at least a fraction of a total depth of the substrate; an insulator material filling the first recess, wherein etching is performed on the insulator material up to a stop depth, wherein the stop depth stops the etching at a height above the surface of the substrate, wherein the liner is removed from at least the first connection end of the layer in the second set; and an electrical connection formed with a source/drain structure using the first connection end of the layer in the second set, wherein a remaining portion of the insulator below the height and a remaining portion of the liner in the first recess increases impedance in a path of a substrate current from the source/drain structure to the substrate. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method comprising:
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depositing, over a surface of a substrate, a first layer comprising a first sacrificial material; depositing, over the first layer, a first set of layers of a second sacrificial material and a second set of layers of a channel material; depositing a liner in a first recess, wherein the first recess exposes a first connection end of a layer in the second set, wherein the first recess reaches into the substrate for at least a fraction of a total depth of the substrate; filling the first recess with an insulator material; etching the insulator material up to a stop depth, wherein the stop depth stops the etching at a height above the surface of the substrate; removing the liner from at least the first connection end of the layer in the second set; and enabling the first connection end of the layer in the second set to form an electrical connection with a source/drain structure, wherein a remaining portion of the insulator below the height and a remaining portion of the liner in the first recess increases impedance in a path of a substrate current from the source/drain structure to the substrate. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18)
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19. A semiconductor fabrication system comprising a lithography component, the semiconductor fabrication system when operated on a wafer to fabricate a semiconductor device performing operations the comprising:
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depositing, over a surface of a substrate, a first layer comprising a first sacrificial material; depositing, over the first layer, a first set of layers of a second sacrificial material and a second set of layers of a channel material; depositing a liner in a first recess, wherein the first recess exposes a first connection end of a layer in the second set, wherein the first recess reaches into the substrate for at least a fraction of a total depth of the substrate; filling the first recess with an insulator material; etching the insulator material up to a stop depth, wherein the stop depth stops the etching at a height above the surface of the substrate; removing the liner from at least the first connection end of the layer in the second set; and enabling the first connection end of the layer in the second set to form an electrical connection with a source/drain structure, wherein a remaining portion of the insulator below the height and a remaining portion of the liner in the first recess increases impedance in a path of a substrate current from the source/drain structure to the substrate. - View Dependent Claims (20)
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Specification