CONTROL METHOD FOR PIXEL CIRCUIT, CONTROL CIRCUIT FOR PIXEL CIRCUIT AND DISPLAY DEVICE

• US 20190130828A1
• Filed: 07/31/2018
• Published: 05/02/2019
• Est. Priority Date: 10/26/2017
• Status: Active Grant

• Current Assignee: BOE Technology Group Co., Ltd.
• Original Assignee: BOE Technology Group Co., Ltd.
• Inventors: Li, Quanhu, Wang, Ling, Yang, Dongfang, Yan, Guang
• Granted Patent: US 10,643,531 B2
• Time in Patent Office: Days
• CPC Class Codes: G09G 2310/08 Details of timing specific for flat panels, other than clock recovery
• CPC Class Codes: G09G 2320/0233 Improving the luminance or brightness uniformity across the screen
• CPC Class Codes: G09G 2320/0238 Improving the black level
• CPC Class Codes: G09G 2320/0295 by monitoring each display pixel
• CPC Class Codes: G09G 2320/045 Compensation of drifts in the characteristics of light emitting or modulating elements
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element

Abstract

A control method for a pixel circuit, a control circuit for a pixel circuit and a display device are provided. A timing sequence of the pixel circuit includes a driving display stage and a non-display stage. The non-display stage includes a reverse bias time period. The control method includes: inputting, in the reverse bias time period, a first control signal to an input end of the pixel circuit to make both the light-emitting element and the driving transistor to be reverse biased.

Claims

1. A control method for a pixel circuit, wherein the pixel circuit comprises a driving transistor configured to drive a light-emitting element, a timing sequence of the pixel circuit comprises a driving display stage and a non-display stage, and the non-display stage comprises a reverse bias time period;

wherein the control method comprises;

inputting, in the reverse bias time period, a first control signal to an input end of the pixel circuit to make both the light-emitting element and the driving transistor reverse biased.

2. The control method according to claim 1, wherein the input end of the pixel circuit comprises:

a first scanning end, a second scanning end, a first power supply end, a second power supply end, a data signal end and a reference input end;

wherein inputting, in the reverse bias time period, the first control signal to the input end of the pixel circuit comprises;

inputting corresponding signals to the first scanning end, the second scanning end, the data signal end, the reference input end, the first power supply end and the second power supply end, respectively;

wherein the reverse bias time period is a time period preselected from the non-display stage.

3. The control method according to claim 2, wherein the pixel circuit comprises a first switching transistor, a second switching transistor and a storage capacitor;

the light-emitting element is a light-emitting diode;

a gate electrode of the driving transistor is connected to the data signal end via the first switching transistor, a first electrode of the driving transistor is connected to the first power supply end, and a second electrode of the driving transistor is connected to an anode of the light-emitting diode; and

the storage capacitor is arranged between the gate electrode and the second electrode of the driving transistor and is connected with the gate electrode and the second electrode of the driving transistor;

wherein the reference input end is connected to the anode of the light-emitting diode and the gate electrode of the driving transistor via the second switching transistor, and a cathode of the light-emitting diode is connected to the second power supply end; and

wherein in the reverse bias time period, a voltage of the signal at the second power supply end is higher than a voltage of the signal at the reference input end, the voltage of the signal at the reference input end is higher than a voltage of the signal at the first power supply end, and the voltage of the signal at the first power supply end is higher than a voltage of the signal at the data signal end.

4. The control method according to claim 3, wherein the voltage of the signal at the first power supply end in the reverse bias time period is lower than a voltage of the signal at the first power supply end in the driving display stage.

5. The control method according to claim 3, wherein the voltage of the signal at the second power supply end in the reverse bias time period is higher than a voltage of the signal at the second power supply end in the driving display stage.

6. The control method according to claim 3, wherein a difference between voltages of the signals at the reference input end and the data signal end in the reverse bias time period is higher than a first threshold.

7. The control method according to claim 3, wherein a voltage of the signal at the data signal end in the reverse bias time period is lower than a threshold voltage of the driving transistor.

8. The control method according to claim 3, wherein a gate electrode of the first switching transistor is connected to the first scanning end, a first electrode of the first switching transistor is connected to the data signal end, and a second electrode of the first switching transistor is connected to the gate electrode of the driving transistor;

a gate electrode of the second switching transistor is connected to the second scanning end, a first electrode of the second switching transistor is connected to the reference input end, and a second electrode of the second switching transistor is connected to the anode of the light-emitting diode and the gate electrode of the driving transistor; and

the first switching transistor, the second switching transistor and the driving transistor each is an N-type thin-film transistor;

wherein in the reverse bias time period, each of the signals at the first scanning end, the second scanning end and the second power supply end is a high level, each of the signals at the first power supply end and the data signal end is a low level, the first switching transistor and the second switching transistor are each switched on, the low level signal at the data signal end is input to the gate electrode of the driving transistor via the first switching transistor to make the driving transistor to be reverse biased; and

the signal at the reference input end is input to the anode of the light-emitting diode via the second switching transistor, the signal input to the cathode of the light-emitting diode from the second power supply end is higher than the voltage of the signal at the reference input end in such a manner that the light-emitting diode is reverse biased.

9. A control circuit for a pixel circuit, wherein the pixel circuit comprises a driving transistor configured to drive a light-emitting element, a timing sequence of the pixel circuit comprises a driving display stage and a non-display stage, and the non-display stage comprises a reverse bias time period;

wherein the control circuit is connected to an input end of the pixel circuit and is configured to input a first control signal to the input end of the pixel circuit in the reverse bias time period to make both the light-emitting element and the driving transistor reverse biased.

10. The control circuit according to claim 9, wherein the input end of the pixel circuit comprises:

a first scanning end, a second scanning end, a first power supply end, a second power supply end, a data signal end and a reference input end;

wherein the control circuit is configured to, in the reverse bias time period, input corresponding signals to the first scanning end, the second scanning end, the data signal end, the reference input end, the first power supply end and the second power supply end respectively; and

wherein the reverse bias time period is a time period preselected from the non-display stage.

11. The control circuit according to claim 9, wherein the pixel circuit comprises a first switching transistor, a second switching transistor and a storage capacitor;

the light-emitting element is a light-emitting diode;

a gate electrode of the driving transistor is connected to the data signal end via the first switching transistor, a first electrode of the driving transistor is connected to the first power supply end, and a second electrode of the driving transistor is connected to the light-emitting diode; and

the storage capacitor is arranged between the gate electrode and the second electrode of the driving transistor and is connected with the gate electrode and the second electrode of the driving transistor;

wherein the reference input end is connected to the anode of the light-emitting diode and the gate electrode of the driving transistor via the second switching transistor and a cathode of the light-emitting diode is connected to the second power supply end; and

wherein in the reverse bias time period, a voltage of the signal at the second power supply end is higher than a voltage of the signal at the reference input end, the voltage of the signal at the reference input end is higher than a voltage of the signal at the first power supply end, and the voltage of the signal at the first power supply end is higher than a voltage of the signal at the data signal end.

12. The control circuit according to claim 11, wherein the voltage of the signal at the first power supply end in the reverse bias time period is lower than a voltage of the signal at the first power supply end in the driving display stage.

13. The control circuit according to claim 11, wherein the voltage of the signal at the second power supply end in the reverse bias time period is higher than a voltage of the signal at the second power supply end in the driving display stage.

14. The control circuit according to claim 11, wherein a difference between voltages of the signals at the reference input end and the data signal end in the reverse bias time period is higher than a first threshold.

15. The control circuit according to claim 11, wherein a voltage of the signal at the data signal end in the reverse bias time period is lower than a threshold voltage of the driving transistor.

16. A display device, comprising a pixel circuit and a control circuit, wherein the pixel circuit comprises a driving transistor configured to drive a light-emitting element, a timing sequence of the pixel circuit comprises a driving display stage and a non-display stage, and the non-display stage comprises a reverse bias time period;

and

wherein the control circuit is connected to an input end of the pixel circuit and is configured to input a first control signal to the input end of the pixel circuit in the reverse bias time period to make both the light-emitting element and the driving transistor reverse biased.

17. The display device according to claim 16, wherein the input end of the pixel circuit comprises:

a first scanning end, a second scanning end, a first power supply end, a second power supply end, a data signal end and a reference input end;

wherein the inputting, in the reverse bias time period, the first control signal to the input end of the pixel circuit comprises;

inputting corresponding signals to the first scanning end, the second scanning end, the data signal end, the reference input end, the first power supply end and the second power supply end, respectively;

wherein the pixel circuit comprises a first switching transistor, a second switching transistor and a storage capacitor;

the light-emitting element is a light-emitting diode;

a gate electrode of the driving transistor is connected to the data signal end via the first switching transistor, a first electrode of the driving transistor is connected to the first power supply end, and a second electrode of the driving transistor is connected to the light-emitting diode; and

the storage capacitor is arranged between the gate electrode and the second electrode of the driving transistor and is connected with the gate electrode and the second electrode of the driving transistor;

wherein the reference input end is connected to the anode of the light-emitting diode and the gate electrode of the driving transistor via the second switching transistor and a cathode of the light-emitting diode is connected to the second power supply end; and

wherein in the reverse bias time period, a voltage of the signal at the second power supply end is higher than a voltage of the signal at the reference input end, the voltage of the signal at the reference input end is higher than a voltage of the signal at the first power supply end, and the voltage of the signal at the first power supply end is higher than a voltage of the signal at the data signal end.

18. The display device according to claim 17, wherein the voltage of the signal at the first power supply end in the reverse bias time period is lower than a voltage of the signal at the first power supply end in the driving display stage.

19. The display device according to claim 17, wherein the voltage of the signal at the second power supply end in the reverse bias time period is higher than a voltage of the signal at the second power supply end in the driving display stage.

20. The display device according to claim 17, wherein a difference between voltages of the signals at the reference input end and the data signal end in the reverse bias time period is higher than a first threshold.