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INTEGRATED CIRCUIT DIE HAVING BACK-END-OF-LINE TRANSISTORS

  • US 20190131437A1
  • Filed: 06/30/2016
  • Published: 05/02/2019
  • Est. Priority Date: 06/30/2016
  • Status: Active Grant
First Claim
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1. An integrated circuit die, comprising:

  • a front-end-of-line (FEOL) portion including a silicon layer having a plurality of transistors, and an insulating layer over the silicon layer; and

    a back-end-of-line (BEOL) portion mounted on the insulating layer, the BEOL portion including a non-planar transistor havingan amorphous oxide semiconductor (AOS) channel extending axially from a first end to a second end, anda gate module extending transversely around the AOS channel at an axial location between a source module at the first end and a drain module at the second end.

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