COMPUTER DEVICE AND POWER ABNORMALITY DETECTION METHOD FOR A COMPUTER DEVICE

• US 20190146571A1
• Filed: 04/03/2018
• Published: 05/16/2019
• Est. Priority Date: 11/15/2017
• Status: Active Grant

• Current Assignee: Wistron Corporation
• Original Assignee: Wistron Corporation
• Inventors: YANG, Ke, LEE, Kai Cheng, HUANG, Jia Sheng, SHANG, Mei Ling, LIAO, Wei Liang
• Granted Patent: US 10,642,334 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 1/266 Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips
• CPC Class Codes: G06F 1/28 Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
• CPC Class Codes: G06F 1/30 Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations for resetting only G06F1/24
• CPC Class Codes: G06F 1/305 in the event of power-supply fluctuations
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/3218 of display devices

Abstract

A computer device includes a microprocessor, a voltage converter circuit converting a first voltage of a system power into a second voltage, a control circuit controlling supply of the second voltage and a detection circuit detecting whether power abnormality at the peripheral device has occurred. When confirming that the system power is being supplied normally, the microprocessor generates a first enable signal to enable the voltage converter circuit. When confirming that the voltage converter circuit functions normally, the microprocessor generates a second enable signal to enable the detection circuit. The detection circuit generates a first detection signal according to detection result for the microprocessor to determine whether to supply the second voltage to the peripheral device. When the first detection signal indicates that power abnormality has not occurred, the microprocessor generates a third enable signal to enable the control circuit to supply the second voltage to the peripheral device.

Claims

1. A computer device coupled to a peripheral device, comprising:

a microprocessor;

a voltage converter circuit, coupled to the microprocessor and configured to convert a first voltage of a system power of the computer device into a second voltage;

a control circuit, coupled to the microprocessor and the voltage converter circuit and configured to control supply of the second voltage; and

a detection circuit, coupled to the microprocessor and a power detection pin and configured to detect whether a power abnormality at the peripheral device has occurred, wherein the power detection pin is coupled to the peripheral device, and

wherein when confirming that the system power is being supplied normally, the microprocessor is configured to generate a first enable signal to enable the voltage converter circuit, and

when confirming that the voltage converter circuit functions normally, the microprocessor is configured to generate a second enable signal to enable the detection circuit, and the detection circuit is configured to generate a first detection signal based on a corresponding detection result, and

wherein the microprocessor is further configured to determine whether to supply the second voltage to the peripheral device according to the first detection signal, when the first detection signal indicates that a power abnormality has not occurred at the peripheral device, the microprocessor generates a third enable signal to enable the control circuit, such that the second

2. The computer device as claimed in claim 1, wherein when confirming that the system power is being supplied normally, the microprocessor is configured to wait for a predetermined period of time and then generate the first enable signal when the predetermined period of time expires.

3. The computer device as claimed in claim 1, further comprising:

a controller chip, coupled to the microprocessor, configured to detect whether the system power is being supplied to the computer device normally and to generate a second detection signal based on a corresponding detection result, wherein the microprocessor is configured to generate the first enable signal according to the second detection signal.

4. The computer device as claimed in claim 1, wherein the voltage converter circuit is further configured to detect whether the second voltage is supplied normally and generate a third detection signal based on a corresponding detection result, and the voltage converter circuit is further configured to detect whether an output current thereof is overloaded and generate a fourth detection signal based on a corresponding detection result, and wherein the microprocessor is further configured to generate the second enable signal according to the third detection signal and the fourth detection signal.

5. The computer device as claimed in claim 1, wherein the detection circuit comprises:

a diode, coupled between the power detection pin and a detection node;

a first resistor, coupled between a voltage input terminal and the detection node; and

a second resistor, coupled between the detection node and a ground node,

wherein a level of voltage at the detection node varies with a level of voltage at the power detection pin.

6. The computer device as claimed in claim 5, wherein the detection circuit further comprises:

a first transistor, coupled to the detection node and comprising a control electrode configured to receive the second enable signal.

7. The computer device as claimed in claim 5, wherein the detection circuit further comprises:

a second transistor, coupled between the detection node and a detection signal output terminal, wherein the detection signal output terminal is configured to output the first detection signal.

8. A power abnormality detection method, suitable for a computer device which is coupled to a peripheral device, the computer device comprising a voltage converter circuit and a detection circuit, the voltage converter circuit being configured to convert a first voltage into a second voltage, the detection circuit being configured to detect whether a power abnormality at the peripheral device has occurred, the method comprising:

detecting whether a system power of the computer device is being supplied normally;

when confirming that the system power is being supplied normally, waiting for a first predetermined period of time and then generating a first enable signal to enable the voltage converter circuit when the first predetermined period of time expires;

detecting whether the voltage converter circuit functions normally;

when confirming that the voltage converter circuit functions normally, generating

detecting whether a power abnormality at the peripheral device has occurred and generating a first detection signal based on a corresponding detection result; and

determining whether to supply the second voltage to the peripheral device according to the first detection signal, wherein when the first detection signal indicates that a power abnormality has not occurred at the peripheral device, supplying the second voltage to the peripheral device.

9. The power abnormality detection method as claimed in claim 8, wherein the step of detecting whether the voltage converter circuit functions normally further comprises:

detecting whether the second voltage is supplied normally; and

detecting whether an output current of the voltage converter circuit is overloaded.

10. The power abnormality detection method as claimed in claim 8, wherein performance of the step of detecting whether a power abnormality at the peripheral