Namespace Change Propagation in Non-Volatile Memory Devices

• US 20190146912A1
• Filed: 12/31/2018
• Published: 05/16/2019
• Est. Priority Date: 11/16/2017
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Frolikov, Alex
• Granted Patent: US 11,003,576 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/0811 with multilevel cache hierarchies
• CPC Class Codes: G06F 12/0884 Parallel mode, e.g. in parallel with main memory or CPU
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages
• CPC Class Codes: G06F 3/0608 Saving storage space on storage systems
• CPC Class Codes: G06F 3/061 Improving I/O performance
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0673 Single storage device
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]

Abstract

A computer storage device having a host interface, a controller, non-volatile storage media, and firmware. The firmware instructs the controller to: generate mapping data defining mapping, from logical block addresses in namespaces configured on the non-volatile storage media, to logical block addresses in a capacity of the non-volatile storage media; maintain an active copy of the mapping data; generate cached copies of the mapping data from the active copy; generate a shadow copy from the active copy; implement changes in the shadow copy; after the changes are made in the shadow copy, activate the shadow copy and simultaneously deactivate the previously active copy; and update the cached copies according to the newly activated copy, as a response to the change in active copy identification.

Claims

1. A solid state drive, comprising:

random access memory;

non-volatile storage media; and

a controller having a plurality of processors, the controller configured to at least;

store a first copy of a namespace map in the random access memory;

configure the first copy of the namespace map as active;

cache the first copy as one or more second copies in one or more processors in the plurality of processors;

replicate, in the random access memory, the first copy as a third copy;

change the third copy in the random access memory while the first copy is configured as active;

configure the third copy as active and the first copy as inactive after the changing of the third copy in the random access memory; and

update the one or more second copies in the one or more processors according to the third copy that is configured as active.

2. The solid state drive of claim 1, wherein the one or more processors are configured to map, using the one or more second copies, between:

logical block addresses in one or more namespaces configured on the non-volatile storage media; and

logical block addresses in a capacity of the non-volatile storage media.

3. The solid state drive of claim 2, wherein the one or more processors are configured to cache the one or more second copies in cache memory of the one or more processors.

4. The solid state drive of claim 3, wherein the controller is configured to update the one or more second copies cached in the one or more processors in accordance with a cache coherence protocol.

5. The solid state drive of claim 2, wherein the random access memory includes volatile dynamic random access memory.

6. The solid state drive of claim 2, wherein the one or more processors are not permitted to modify the one or more second copies other than updating according to a copy of the namespace map that is configured as active in the random access memory.

7. The solid state drive of claim 6, wherein no more than a single running instance of a component of firmware of the solid state drive is permitted to change a copy of the namespace map that is configured as inactive in the random access memory.

8. The solid state drive of claim 7, further comprising:

an active indicator, wherein a copy of the namespace map in the random access memory identified by the active indicator is configured to be active.

9. The solid state drive of claim 8, wherein any copy in the random access memory that is not being identified by the active indicator is configured as inactive.

10. The solid state drive of claim 8, wherein in response to a change in the active indicator, the controller is configured to generate a request to pause or delay data access in a namespace.

11. The solid state drive of claim 10, wherein the request is discarded after the one or more second copies are updated according to the third copy.

12. The solid state drive of claim 10, wherein the request causes a pause in data write operations in the particular namespace, but not in data read operations in the namespace.

13. The solid state drive of claim 10, wherein the request causes a pause in data read operations in the particular namespace, but not in data write operations in the namespace.

14. The solid state drive of claim 11, wherein the controller is configured to generate the request in accordance with a data access policy configured in the solid state drive.

15. A method implemented in a solid state drive, the method comprising:

storing a first copy of a namespace map in random access memory of the solid state drive;

configuring the first copy as active;

caching the first copy as one or more second copies in one or more processors of the solid state drive;

replicating the first copy in the random access memory as a third copy;

changing the third copy while the first copy is configured as active;

configuring the third copy as active and the first copy as inactive after the changing of the third copy; and

updating the one or more second copies in the one or more processors according to the third copy that is configured as active.

16. The method of claim 15, further comprising:

mapping, using the one or more second copies of the namespace map, between;

logical block addresses in one or more namespaces configured on non-volatile storage media of the solid state drive; and

logical block addresses in a storage capacity of the solid state drive.

17. The method of claim 16, wherein the update of the one or more second copies cached in the one or more processors is in accordance with a cache coherence protocol;

and the configuring the third copy as active and the first copy as inactive is performed by replacing, in an active indicator of the solid state drive, an identifier of the first copy with an identifier of the second copy.

18. A non-transitory computer storage medium storing instructions which, when executed in a solid state drive, cause the solid state drive to perform a method, the method comprising:

storing a first copy of a namespace map in random access memory of the solid state drive;

configuring the first copy as active;

caching the first copy as one or more second copies in one or more processors of the solid state drive;

replicating the first copy in the random access memory as a third copy;

changing the third copy while the first copy is configured as active;

configuring the third copy as active and the first copy as inactive after the changing of the third copy; and

updating the one or more second copies in the one or more processors according to the third copy that is configured as active.

19. The non-transitory computer storage medium of claim 18, wherein the method further comprises:

mapping, using the one or more second copies of the namespace map, between;

logical block addresses in one or more namespaces configured on non-volatile storage media of the solid state drive; and

logical block addresses in a storage capacity of the solid state drive.

20. The non-transitory computer storage medium of claim 19, wherein the configuring the third copy as active and the first copy as inactive comprises:

configuring an active indicator to identify the third copy in the random access memory.