Method and System for Circuit Simulation

• US 20190188347A1
• Filed: 12/14/2017
• Published: 06/20/2019
• Est. Priority Date: 12/14/2017
• Status: Active Grant

• Current Assignee: Tian Yu
• Original Assignee: Tian Yu
• Inventors: TIAN, Yu
• Granted Patent: US 10,445,448 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 30/367 Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods

Abstract

Embodiments of the present disclosure provide a method, a system and a computer readable storage medium for circuit simulation, comprising: partitioning circuit into a subcircuit-1 and a subcircuit-2 which are connected through at least one port; generating equivalent circuit of subcircuit-1 based on port current/port voltage, subcircuit-1 port voltage under port open-circuit condition/subcircuit-1 port current under port short-circuit condition, and impulse-response of subcircuit-1 port voltage to port current/impulse-response of subcircuit-1 port current to port voltage; simulating a simplified circuit comprising the subcircuit-2 and the equivalent circuit. Comparing with prior art, this disclosure reduces circuit scale by equivalence of linear portion of circuit. Thereby computation amount for circuit simulation is reduced and the computation time for circuit simulation is shortened.

Claims

1. A computer-implemented method for circuit simulation, comprising:

partitioning a circuit into a subcircuit-1 and a subcircuit-2 which are connected through at least one port; and

simulating a circuit comprising the subcircuit-2 and an equivalent circuit of the subcircuit-1, wherein the equivalent circuit comprises a subcircuit selected from the group consisting of;

(a) an equivalent voltage in series with an equivalent resistance, wherein the equivalent voltage is obtained by;

convolving a port current with an impulse-response of subcircuit-1 port voltage to port current, to obtain a transient-equivalent-voltage; and

adding the transient-equivalent-voltage to a subcircuit-1 port voltage under port open-circuit condition, and wherein the equivalent resistance is obtained from a selected point of the impulse-response,

(b) an equivalent voltage, wherein the equivalent voltage is obtained by;

convolving a port current with an impulse-response of subcircuit-1 port voltage to port current, to obtain a transient-equivalent-voltage; and

adding the transient-equivalent-voltage to a subcircuit-1 port voltage under port open-circuit condition,

(c) an equivalent current in parallel with an equivalent conductance, wherein the equivalent current is obtained by;

convolving a port voltage with an impulse-response of subcircuit-1 port current to port voltage, to obtain a transient-equivalent-current; and

adding the transient-equivalent-current to a subcircuit-1 port current under port short-circuit condition, and wherein the equivalent conductance is obtained from a selected point of the impulse-response, and

(d) an equivalent current, wherein the equivalent current is obtained by;

convolving a port voltage with an impulse-response of subcircuit-1 port current to port voltage, to obtain a transient-equivalent-current; and

adding the transient-equivalent-current to a subcircuit-1 port current under port short-circuit condition.

2. The method as described in claim 1, wherein circuit elements in the subcircuit-1 are linear-time-invariant.

3. The method as described in claim 1, further comprising:

obtaining subcircuit-1 output node voltage by;

convolving a port current with an impulse-response of subcircuit-1 output node voltage to port current, to obtain a transient-node-voltage; and

adding the transient-node-voltage to a subcircuit-1 output node voltage under port open-circuit condition; and

obtaining subcircuit-1 output branch current by;

convolving a port current with an impulse-response of subcircuit-1 output branch current to port current, to obtain a transient-branch-current; and

adding the transient-branch-current to a subcircuit-1 output branch current under port open-circuit condition.

4. The method as described in claim 1, further comprising:

obtaining subcircuit-1 output node voltage by;

convolving a port voltage with an impulse-response of subcircuit-1 output node voltage to port voltage, to obtain a transient-node-voltage; and

adding the transient-node-voltage to a subcircuit-1 output node voltage under port short-circuit condition; and

obtaining subcircuit-1 output branch current by;

convolving a port voltage with an impulse-response of subcircuit-1 output branch current to port voltage, to obtain a transient-branch-current; and

adding the transient-branch-current to a subcircuit-1 output branch current under port short-circuit condition.

5. The method as described in claim 1, further comprising:

providing a subcircuit-1 port voltage under port open-circuit condition; and

providing an impulse-response of subcircuit-1 port voltage to port current.

6. The method as described in claim 1, further comprising:

providing a subcircuit-1 port current under port short-circuit condition; and

providing an impulse-response of subcircuit-1 port current to port voltage.

7. A system, comprising:

a processor; and

a memory storing instructions that, when executed by the processor, cause the processor to perform an operation for circuit simulation, the operation comprising;

partitioning a circuit into a subcircuit-1 and a subcircuit-2 which are connected through at least one port; and

simulating a circuit comprising the subcircuit-2 and an equivalent circuit of the subcircuit-1, wherein the equivalent circuit comprises a subcircuit selected from the group consisting of;

(a) an equivalent voltage in series with an equivalent resistance, wherein the equivalent voltage is obtained by;

convolving a port current with an impulse-response of subcircuit-1 port voltage to port current, to obtain a transient-equivalent-voltage; and

adding the transient-equivalent-voltage to a subcircuit-1 port voltage under port open-circuit condition, and wherein the equivalent resistance is obtained from a selected point of the impulse-response,

(b) an equivalent voltage, wherein the equivalent voltage is obtained by;

convolving a port current with an impulse-response of subcircuit-1 port voltage to port current, to obtain a transient-equivalent-voltage; and

adding the transient-equivalent-voltage to a subcircuit-1 port voltage under port open-circuit condition,

(c) an equivalent current in parallel with an equivalent conductance, wherein the equivalent current is obtained by;

convolving a port voltage with an impulse-response of subcircuit-1 port current to port voltage, to obtain a transient-equivalent-current; and

adding the transient-equivalent-current to a subcircuit-1 port current under port short-circuit condition, and wherein the equivalent conductance is obtained from a selected point of the impulse-response, and

(d) an equivalent current, wherein the equivalent current is obtained by;

convolving a port voltage with an impulse-response of subcircuit-1 port current to port voltage, to obtain a transient-equivalent-current; and

adding the transient-equivalent-current to a subcircuit-1 port current under port short-circuit condition.

8. The system as described in claim 7, wherein circuit elements in the subcircuit-1 are linear-time-invariant.

9. The system as described in claim 7, further comprising:

obtaining subcircuit-1 output node voltage by;

convolving a port current with an impulse-response of subcircuit-1 output node voltage to port current, to obtain a transient-node-voltage; and

adding the transient-node-voltage to a subcircuit-1 output node voltage under port open-circuit condition; and

obtaining subcircuit-1 output branch current by;

convolving a port current with an impulse-response of subcircuit-1 output branch current to port current, to obtain a transient-branch-current; and

adding the transient-branch-current to a subcircuit-1 output branch current under port open-circuit condition.

10. The system as described in claim 7, further comprising:

obtaining subcircuit-1 output node voltage by;

convolving a port voltage with an impulse-response of subcircuit-1 output node voltage to port voltage, to obtain a transient-node-voltage; and

adding the transient-node-voltage to a subcircuit-1 output node voltage under port short-circuit condition; and

obtaining subcircuit-1 output branch current by;

convolving a port voltage with an impulse-response of subcircuit-1 output branch current to port voltage, to obtain a transient-branch-current; and

adding the transient-branch-current to a subcircuit-1 output branch current under port short-circuit condition.

11. The system as described in claim 7, further comprising:

providing a subcircuit-1 port voltage under port open-circuit condition; and

providing an impulse-response of subcircuit-1 port voltage to port current.

12. The system as described in claim 7, further comprising:

providing a subcircuit-1 port current under port short-circuit condition; and

providing an impulse-response of subcircuit-1 port current to port voltage.

13. A computer readable storage medium having stored thereon instructions that when executed by a processor causes a processor to perform an operation for circuit simulation, comprising:

partitioning a circuit into a subcircuit-1 and a subcircuit-2 which are connected through at least one port; and

simulating a circuit comprising the subcircuit-2 and an equivalent circuit of the subcircuit-1, wherein the equivalent circuit comprises a subcircuit selected from the group consisting of;

(a) an equivalent voltage in series with an equivalent resistance, wherein the equivalent voltage is obtained by;

convolving a port current with an impulse-response of subcircuit-1 port voltage to port current, to obtain a transient-equivalent-voltage; and

adding the transient-equivalent-voltage to a subcircuit-1 port voltage under port open-circuit condition, and wherein the equivalent resistance is obtained from a selected point of the impulse-response,

(b) an equivalent voltage, wherein the equivalent voltage is obtained by;

convolving a port current with an impulse-response of subcircuit-1 port voltage to port current, to obtain a transient-equivalent-voltage; and

adding the transient-equivalent-voltage to a subcircuit-1 port voltage under port open-circuit condition,

(c) an equivalent current in parallel with an equivalent conductance, wherein the equivalent current is obtained by;

convolving a port voltage with an impulse-response of subcircuit-1 port current to port voltage, to obtain a transient-equivalent-current; and

adding the transient-equivalent-current to a subcircuit-1 port current under port short-circuit condition, and wherein the equivalent conductance is obtained from a selected point of the impulse-response, and

(d) an equivalent current, wherein the equivalent current is obtained by;

convolving a port voltage with an impulse-response of subcircuit-1 port current to port voltage, to obtain a transient-equivalent-current; and

adding the transient-equivalent-current to a subcircuit-1 port current under port short-circuit condition.

14. The computer readable storage medium as described in claim 13, wherein circuit elements in the subcircuit-1 are linear-time-invariant.

15. The computer readable storage medium as described in claim 13, further comprising:

obtaining subcircuit-1 output node voltage by;

convolving a port current with an impulse-response of subcircuit-1 output node voltage to port current, to obtain a transient-node-voltage; and

adding the transient-node-voltage to a subcircuit-1 output node voltage under port open-circuit condition; and

obtaining subcircuit-1 output branch current by;

convolving a port current with an impulse-response of subcircuit-1 output branch current to port current, to obtain a transient-branch-current; and

adding the transient-branch-current to a subcircuit-1 output branch current under port open-circuit condition.

16. The computer readable storage medium as described in claim 13, further comprising:

obtaining subcircuit-1 output node voltage by;

convolving a port voltage with an impulse-response of subcircuit-1 output node voltage to port voltage, to obtain a transient-node-voltage; and

adding the transient-node-voltage to a subcircuit-1 output node voltage under port short-circuit condition; and

obtaining subcircuit-1 output branch current by;

convolving a port voltage with an impulse-response of subcircuit-1 output branch current to port voltage, to obtain a transient-branch-current; and

adding the transient-branch-current to a subcircuit-1 output branch current under port short-circuit condition.

17. The computer readable storage medium as described in claim 13, further comprising:

providing a subcircuit-1 port voltage under port open-circuit condition; and

providing an impulse-response of subcircuit-1 port voltage to port current.

18. The computer readable storage medium as described in claim 13, further comprising:

providing a subcircuit-1 port current under port short-circuit condition; and

providing an impulse-response of subcircuit-1 port current to port voltage.