STORAGE BACKED MEMORY PACKAGE SAVE TRIGGER
First Claim
Patent Images
1. A memory package, the memory package comprising:
- a volatile portion to store data;
a non-volatile portion;
a first interface to;
receive the data; and
receive a reset signal;
a second interface arranged to connect to a host; and
a processing device to save the data stored in the volatile portion to the non-volatile portion in response to the reset signal.
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Accused Products
Abstract
Devices and techniques for a storage backed memory package save trigger are disclosed herein. Data can be received via a first interface. The data is stored in a volatile portion of the memory package. Here, the memory package includes a second interface arranged to connect a host to a controller in the memory package. A reset signal can be received at the memory package via the first interface. The data stored in the volatile portion of the memory package can be saved to a non-volatile portion of the memory package in response to the reset signal.
2 Citations
21 Claims
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1. A memory package, the memory package comprising:
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a volatile portion to store data; a non-volatile portion; a first interface to; receive the data; and receive a reset signal; a second interface arranged to connect to a host; and a processing device to save the data stored in the volatile portion to the non-volatile portion in response to the reset signal. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A method comprising:
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receiving data via a first interface to store in a volatile portion of a memory package, the memory package including a second interface arranged to connect a host to a processing device in the memory package; receiving a reset signal at the memory package via the first interface; and saving the data stored in the volatile portion of the memory package to a non-volatile portion of the memory package in response to the reset signal. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. At least one machine readable medium including instructions, the instructions, when executed by processing circuitry of the memory package, cause the memory package to perform operations comprising:
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receiving data via a first interface to store in a volatile portion of the memory package, the memory package including a second interface arranged to connect a host to a processing device in the memory package; receiving a reset signal at the memory package via the first interface; and saving the data stored in the volatile portion of the memory package to a non-volatile portion of the memory package in response to the reset signal. - View Dependent Claims (16, 17, 18, 19, 20, 21)
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Specification