ADAPTIVE PROGRAMMING VOLTAGE FOR NON-VOLATILE MEMORY DEVICES

• US 20190272871A1
• Filed: 03/02/2018
• Published: 09/05/2019
• Est. Priority Date: 03/02/2018
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Inventors: Yang, Xiang, Tseng, Huai-Yuan, Dutta, Deepanshu
• Granted Patent: US 10,643,692 B2
• Time in Patent Office: Days
• CPC Class Codes: G11C 11/5628 Programming or writing circuits; Data input circuits
• CPC Class Codes: G11C 11/5642 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 16/0483 comprising cells having several storage transistors connected in series
• CPC Class Codes: G11C 16/10 Programming or data input circuits
• CPC Class Codes: G11C 16/3418 Disturbance prevention or evaluation; Refreshing of disturbed memory data
• CPC Class Codes: G11C 2211/5621 Multilevel programming verification

Abstract

Apparatuses, systems, and methods are disclosed for adjusting a programming setting such as a programming voltage of a set of non-volatile storage cells, such as an SLC NAND array. The non-volatile storage cells may be arranged into a plurality of word lines. A subset of the non-volatile storage cells may be configured to store a programming setting. An on-die controller may be configured to read the programming setting from the setting subset, and write data to the non-volatile storage cells, using the programming setting. The on-die controller may further be configured to determine that the programming setting causes suboptimal programming of one or more of the non-volatile storage cells, and in response to the determination, store a revised programming setting on the setting subset.

Claims

1. A memory die comprising:

a set of non-volatile storage cells arranged into a plurality of word lines, wherein a subset of the cells is configured to store a programming setting; and

an on-die controller configured to;

read the programming setting from the subset of the cells;

write data to the non-volatile storage cells, using the programming setting;

determine that the programming setting causes suboptimal programming of data to the non-volatile storage cells; and

in response to determining that the programming setting causes suboptimal programming of data to the non-volatile storage cells, store a revised programming setting in non-volatile storage cells of the subset.

2. The memory die of claim 1, wherein:

the programming setting indicates a first programming voltage;

the on-die controller is further configured to write the data to the non-volatile storage cells by transmitting a single pulse at the first programming voltage through the non-volatile storage cells; and

the revised programming setting indicates a second programming voltage lower than the first programming voltage.

3. The memory die of claim 1, wherein the on-die controller is further configured to store the revised programming setting in non-volatile storage cells of the subset without first erasing the programming setting from the subset.

4. The memory die of claim 1, wherein the plurality of word lines comprises:

a dummy word line comprising two or more spare columns comprising the subset of the cells; and

a plurality of data word lines, separate from the dummy word line, the plurality of data word lines configured to store the data.

5. The memory die of claim 4, wherein the subset of the cells is positioned proximate a driver of the dummy word line.

6. The memory die of claim 1, wherein:

the non-volatile storage cells are arranged into a plurality of blocks comprising;

a first block comprising the plurality of word lines; and

a second block comprising a second plurality of word lines; and

the on-die controller is further configured to;

read a second programming setting from a second subset of the second plurality of word lines;

write data to the non-volatile storage cells of the second plurality of word lines, using the second programming setting;

determine that the second programming setting causes suboptimal programming of one or more of the non-volatile storage cells of the second plurality of word lines; and

in response to determining that the second programming setting causes suboptimal programming of one or more of the non-volatile storage cells of the second plurality of word lines, store a revised second programming setting on the second subset.

7. The memory die of claim 1, wherein the on-die controller is further configured to:

determine a number of cells with a threshold voltage within a predetermined range; and

determine whether the number of cells with the threshold voltage within the predetermined range satisfies one or more criteria.

8. The memory die of claim 1, wherein the on-die controller is further configured to determine that the programming setting causes suboptimal programming of data to the non-volatile storage cells in response to a trigger that is configured to activate after a random number of programming operations are performed on one or more of the word lines.

9. An apparatus comprising:

a set of non-volatile storage cells arranged into word lines and connected to bit lines, the word lines comprising;

a dummy word line configured to store a programming voltage flag; and

a plurality of data word lines;

an on-die controller comprising;

a storage circuit configured to;

use a first programming voltage associated with the programming voltage flag to store user data in non-volatile storage cells of the word lines;

a determination circuit configured to determine that the first programming voltage causes over-programming of the non-volatile storage cells;

a setting selection circuit configured to, in response to determination that the first programming voltage causes over-programming of the non-volatile storage cells, select a second programming voltage different from the first programming voltage; and

an update circuit configured to store a revised programming voltage flag associated with the second programming voltage in the dummy word line by overwriting at least part of the programming voltage flag with the revised programming voltage flag.

10. The apparatus of claim 9, wherein:

the storage circuit is further configured to store the user data by transmitting a single pulse at the first programming voltage through the non-volatile storage cells; and

the second programming voltage is lower than the first programming voltage.

11. The apparatus of claim 10, wherein the determination circuit is further configured to determine that the first programming voltage causes over-programming of the non-volatile storage cells by determining that the single pulse causes over-programming of one or more of the non-volatile storage cells.

12. The apparatus of claim 11, wherein:

the on-die controller further comprises;

a random number generator configured to generate a random number; and

an evaluation circuit configured to determine that the random number meets one or more criteria; and

the determination circuit is further configured to determine that the single pulse causes over-programming of one or more of the non-volatile storage cells in response to determination, by the evaluation circuit, that the random number meets the one or more criteria.

13. The apparatus of claim 9, wherein the dummy word line is further configured to store the programming voltage flag in a spare column of the dummy word line, proximate a decoder of the dummy word line.

14. The apparatus of claim 9, wherein:

the dummy word line comprises a byte that stores the programming voltage flag with one or more bits set to an erased state; and

the storage circuit is further configured to store the revised programming voltage flag by changing the one or more bits to a programmed state without changing any bit of the byte to an erased state.

15. A system comprising:

an SLC NAND array comprising a set of non-volatile storage cells; and

an on-die controller that shares a die with the SLC NAND array, wherein the on-die controller is configured to;

read a programming voltage setting from the SLC NAND array; and

initiate a single pulse to write data on the SLC NAND array at the programming voltage setting.

16. The system of claim 15, wherein the on-die controller is further configured to store an updated programming voltage setting on the SLC NAND array.

17. The system of claim 16, wherein the on-die controller is further configured to:

determine that writing the data at the programming voltage setting causes over-programming of one or more of the non-volatile storage cells; and

initiate storage of the updated programming voltage setting in response to determining that writing the data at the programming voltage setting causes over-programming of one or more of the non-volatile storage cells.

18. The system of claim 16, wherein the on-die controller is further configured to store the updated programming voltage setting without erasing the programming voltage setting from the SLC NAND array.

19. A method comprising:

reading a programming setting from a setting segment of non-volatile storage cells;

writing data on a data segment of non-volatile storage cells using the programming setting; and

in response to a trigger, storing a revised programming setting on the setting segment.

20. The method of claim 19, wherein:

the programming setting indicates a first programming voltage;

writing the data on the data segment comprises transmitting a single pulse at the programming voltage through the data segment; and

storing the revised programming setting comprises storing indication of a second programming voltage, lower than the first programming voltage, on the setting segment.

21. The method of claim 19, wherein storing the revised programming setting comprises over-writing at least part of the programming setting to store the revised programming setting.

22. The method of claim 19, further comprising providing the trigger by determining that the programming setting causes a threshold voltage of one or more of the non-volatile storage cells to exceed a predefined level.

23. The method of claim 22, wherein determining that the programming setting causes the threshold voltage to exceed the predefined level comprises:

determining a number of cells with a threshold voltage within a predetermined range; and

determining whether the number of cells with the threshold voltage within the predetermined range satisfies one or more criteria.

24. The method of claim 19, further comprising providing the trigger by:

generating a random number; and

detecting the trigger by determining that the random number meets one or more criteria.

25. An apparatus comprising:

means for reading a programming setting on a spare column of a first word line of a plurality of word lines of a set of non-volatile storage cells;

means for writing data to one or more of the plurality of word lines using the programming setting;

means for determining that the programming setting causes a threshold voltage of one or more of the non-volatile storage cells to be excessive; and

means for storing a revised programming setting on the spare column of the first word line in response to determining that the programming setting causes the threshold voltage to be excessive.