SEMICONDUCTOR DEVICES INCLUDING CONTROL LOGIC LEVELS, AND RELATED MEMORY DEVICES, CONTROL LOGIC ASSEMBLIES, ELECTRONIC SYSTEMS, AND METHODS
First Claim
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1. An apparatus, comprising:
- a first deck overlying and in electrical communication with base control logic structure, the first deck comprising;
a first memory element level comprising first memory elements; and
a first control logic level in electrical communication with the first memory element level and comprising first CMOS devices individually exhibiting first horizontally-neighboring transistors; and
a second deck overlying the first deck and in electrical communication with base control logic structure, the second deck comprising;
a second memory element level comprising second memory elements; and
a second control logic level in electrical communication with the second memory element level and comprising second CMOS devices individually exhibiting second horizontally-neighboring transistors.
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Abstract
A semiconductor device comprises a stack structure comprising decks each comprising a memory element level comprising memory elements, and a control logic level in electrical communication with the memory element level and comprising control logic devices. At least one of the control logic devices of the control logic level of one or more of the decks comprises at least one device exhibiting transistors laterally displaced from one another. A memory device, a thin film transistor control logic assembly, an electronic system, and a method of operating a semiconductor device are also described.
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Citations
20 Claims
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1. An apparatus, comprising:
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a first deck overlying and in electrical communication with base control logic structure, the first deck comprising; a first memory element level comprising first memory elements; and a first control logic level in electrical communication with the first memory element level and comprising first CMOS devices individually exhibiting first horizontally-neighboring transistors; and a second deck overlying the first deck and in electrical communication with base control logic structure, the second deck comprising; a second memory element level comprising second memory elements; and a second control logic level in electrical communication with the second memory element level and comprising second CMOS devices individually exhibiting second horizontally-neighboring transistors. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A memory device, comprising:
multiple tiers each individually comprising; a memory level comprising memory elements; and a control logic level in electrical communication with the memory element level and comprising CMOS devices each individually comprising; an NMOS transistor; and a PMOS transistor horizontally displaced from the NMOS transistor. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19)
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20. An electronic system, comprising:
at least one apparatus comprising; multiple decks each individually comprising; a memory element level comprising memory elements; an access device level comprising access devices electrically coupled to the memory elements of the memory element level; and a control logic level in electrical communication with the memory element level and the access device level, the control logic level comprising at least one thin film transistor CMOS device comprising; an NMOS transistor; and a PMOS transistor horizontally neighboring the NMOS transistor.
Specification