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SEMICONDUCTOR DEVICES INCLUDING CONTROL LOGIC LEVELS, AND RELATED MEMORY DEVICES, CONTROL LOGIC ASSEMBLIES, ELECTRONIC SYSTEMS, AND METHODS

  • US 20190304970A1
  • Filed: 06/17/2019
  • Published: 10/03/2019
  • Est. Priority Date: 12/29/2017
  • Status: Active Grant
First Claim
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1. An apparatus, comprising:

  • a first deck overlying and in electrical communication with base control logic structure, the first deck comprising;

    a first memory element level comprising first memory elements; and

    a first control logic level in electrical communication with the first memory element level and comprising first CMOS devices individually exhibiting first horizontally-neighboring transistors; and

    a second deck overlying the first deck and in electrical communication with base control logic structure, the second deck comprising;

    a second memory element level comprising second memory elements; and

    a second control logic level in electrical communication with the second memory element level and comprising second CMOS devices individually exhibiting second horizontally-neighboring transistors.

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