DRIVE CIRCUIT FOR SWITCH

• US 20190310675A1
• Filed: 04/02/2019
• Published: 10/10/2019
• Est. Priority Date: 04/05/2018
• Status: Active Grant

• Current Assignee: DENSO Corporation
• Original Assignee: DENSO Corporation
• Inventors: ARARAGI, Akifumi
• Granted Patent: US 10,831,225 B2
• Time in Patent Office: Days
• CPC Class Codes: G05F 1/461 using an operational amplifier as final control device
• CPC Class Codes: G05F 3/08 wherein the variable is dc
• CPC Class Codes: H02M 1/0054 Transistor switching losses periodically suspending operation of switching converter in low power mode H02M1/0035
• CPC Class Codes: H02M 1/08 Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
• CPC Class Codes: H02M 7/5387 in a bridge configuration
• CPC Class Codes: H02M 7/53875 with analogue control of three-phase output
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

In a drive circuit, a reference voltage generator generates a reference voltage that monotonically increases in a direction to pass through the threshold voltage during a voltage at the control terminal being lower than the Miller voltage. A buffer unit supplies the reference voltage output from the reference voltage generator to the control terminal of the switch, and adjusts a first transfer rate of electrical charge to or from the control terminal of the switch during at least part of a Miller period to be higher than a second transfer rate of electrical charge to or from the control terminal of the switch during the voltage at the control terminal of the switch passing through the threshold voltage. The Miller period is a period during which the voltage at the control terminal of the switch is maintained at the Miller voltage.

Claims

1. A drive circuit for driving a switch having a control terminal, a Miller voltage, and a threshold voltage lower than the Miller voltage, the drive circuit comprising:

a reference voltage generator configured to;

generate a reference voltage that monotonically increases in a direction to pass through the threshold voltage during a voltage at the control terminal being lower than the Miller voltage; and

a buffer unit configured to;

supply the reference voltage output from the reference voltage generator to the control terminal of the switch; and

adjust a first transfer rate of electrical charge to or from the control terminal of the switch during at least part of a Miller period to be higher than a second transfer rate of electrical charge to or from the control terminal of the switch during the voltage at the control terminal passing through the threshold voltage, the Miller period being a period during which the voltage at the control terminal of the switch is maintained at the Miller voltage.

2. The drive circuit according to claim 1, wherein:

the reference voltage generator is configured to;

generate the reference voltage that increases during at least a first period, and output the reference voltage to the buffer unit, the first period being a period during which the voltage at the control terminal increases from a first time of an on command for the switch being input to the control terminal to a second time of the voltage at the control terminal passing through the threshold voltage; and

the buffer unit is configured to;

supply the reference voltage output from the reference voltage generator to the control terminal of the switch; and

adjust a first charging current supplied to the control terminal of the switch during at least part of the Miller period to be higher than a second charging current supplied to the control terminal of the switch during the voltage at the control terminal passing through the threshold voltage.

3. The drive circuit according to claim 2, wherein:

the reference voltage generator is configured to;

generate, based on a power supply voltage higher than the Miller voltage, the reference voltage that increases during at least a second period, and output the reference voltage to the buffer unit, the second period being a period during which the voltage at the control terminal increases from the first time of the on command for the switch being input to the control terminal to the second time of the voltage at the control terminal reaching a predetermined voltage higher than the Miller voltage.

4. The drive circuit according to claim 2, wherein:

the buffer unit comprises;

a first charge control switch comprised of an NPN transistor having a base, a collector, and an emitter, the base being connected to the reference voltage generator, a power supply voltage higher than the Miller voltage being input to the collector;

a second charge control switch comprised of an NPN transistor having a base, a collector, and an emitter, the collector of the second charge control switch being connected to the reference voltage generator, the base of the second charge control switch being connected to the emitter of the first charge control switch; and

a charge limit resistor having opposing first and second ends, the first end being connected to the emitter of the first charge control switch, the second end being connected to the control terminal of the switch.

5. The drive circuit according to claim 3, wherein:

the reference voltage generator is configured to;

adjust a first increase rate of the reference voltage during the voltage at the control terminal being higher than the Miller voltage to be higher than a second increase rate of the reference voltage during the voltage at the control terminal passing through the threshold voltage.

6. The drive circuit according to claim 2, wherein:

the reference voltage generator is configured to;

generate the reference voltage that gradually increases from an initial value that is set to be more than zero and lower than the threshold voltage.

7. The drive circuit according to claim 2, wherein:

the reference voltage generator comprises;

a constant current source configured to output a constant current based on a voltage that is supplied from a power source and is higher than the Miller voltage;

a charge switch having opposing first and second ends, the first end of the charge switch being connected to the constant current source; and

a capacitor having opposing first and second electrodes, the first end of the capacitor being connected to the second end of the charge switch,

the reference voltage generator being configured to output a potential at the first electrode of the capacitor as the reference voltage.

8. The drive circuit according to claim 2, wherein:

the reference voltage generator comprises;

a voltage generation resistor having opposing first and second ends, the first end of the voltage generation resistor being connected to a power source that outputs a voltage higher than the Miller voltage;

a charge switch having opposing first and second ends, the first end of the charge switch being connected to the second end of the voltage generation resistor; and

a capacitor having opposing first and second electrodes, the first end of the capacitor being connected to the second end of the charge switch,

the reference voltage generator being configured to output a potential at the first electrode of the capacitor as the reference voltage.

9. The drive circuit according to claim 1, wherein:

the reference voltage generator is configured to;

generate the reference voltage that decreases during at least a third period, and output the reference voltage to the buffer unit, the third period being a period during which the voltage at the control terminal decreases from the Miller voltage down to pass through the threshold voltage; and

the buffer unit is configured to;

supply the reference voltage output from the reference voltage generator to the control terminal of the switch; and

adjust a first discharging current discharged from the control terminal of the switch during at least part of the Miller period to be higher than a second discharging current discharged from the control terminal of the switch during the voltage at the control terminal passing through the threshold voltage.

10. The drive circuit according to claim 9, wherein:

the buffer unit comprises;

a first discharge control switch comprised of a PNP transistor having a base, a collector, and an emitter, the base being connected to the reference voltage generator, the collector being connected to a signal ground;

a second discharge control switch comprised of a PNP transistor having a base, a collector, and an emitter, the collector of the second discharge control switch being connected to the reference voltage generator, the base of the second discharge control switch being connected to the emitter of the first discharge control switch; and

a discharge limit resistor having opposing first and second ends, the first end being connected to the emitter of the second discharge control switch and to the control terminal of the switch, the second end being connected to the emitter of the first discharge control switch and to the base of the second discharge control switch.

11. The drive circuit according to claim 1, wherein:

the switch comprises at least first and second switches parallely connected to each other,

the drive circuit further comprising;

a controller configured to;

control a first switching timing of the first switch from one of an on state and an off state to the other thereof to be shifted from a second switching timing of the second switch from one of the on state and the off state to the other thereof,

wherein the drive circuit is configured to

control the voltage at the control terminal of one of the first and second switches to be maintained at the Miller voltage of one of the first and second switches while controlling the voltage at the control terminal of the other of the first and second switches to be maintained during the voltage at the control terminal of the other of the first and second switches passing through the corresponding threshold voltage; and

adjust a transfer rate of electrical charge to or from the control terminal of one of the first and second switches during at least part of the Miller period to be lower than a transfer rate of electrical charge to or from the control terminal of the other of the first and second switches during the voltage at the control terminal of the other of the first and second switches passing through the corresponding threshold voltage.