PERSISTENT MEMORY UPDATING

• US 20190310796A1
• Filed: 12/21/2016
• Published: 10/10/2019
• Est. Priority Date: 12/21/2016
• Status: Active Grant

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Inventors: PEREZ, Taciano, MEDAGLIA, Diego, MARCHESE, Tadeu
• Granted Patent: US 10,860,246 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 11/1469 Backup restoration techniques
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/0292 using tables or multilevel address translation means G06F12/023 takes precedence; address translation in virtual memory systems G06F12/10
• CPC Class Codes: G06F 12/1009 using page tables, e.g. page table structures
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages
• CPC Class Codes: G06F 3/0604 Improving or facilitating administration, e.g. storage management
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G06F 8/654 using techniques specially adapted for alterable solid state memories, e.g. for EEPROM or flash memories

Abstract

Examples associated with persistent memory updating are described. One example includes receiving a first store instruction associated with a first page of memory in a persistent memory from an application. The first page is copied to a new page of the persistent memory. A virtual address space of the application is updated to a location of the new page in a read-write mode. The first store instruction is executed on the new page. A file mapping in the persistent memory is updated from a location of the first page to the location of the new page, and the virtual address space for the location of the new page is updated to a read-only mode.

Claims

1. A system, comprising:

a persistent memory comprising;

a set of memory blocks storing portions of files;

a file mapping that maps portions of files to memory blocks in which the portions of files are stored; and

a transaction log;

a page table to map virtual addresses used by an application to blocks of persistent memory;

a transaction initiation module to create a transaction record upon initiation of a transaction by the application;

a modification module to, upon receiving an instruction from the application to modify a read-only memory block, create a read-write copy of the read-only memory block, record an association between the read-only memory block and the read-write copy in the transaction record, and update an address in the page table associated with the read-only memory block to an address associated with the read-write copy; and

a transaction completion module to upon receiving an instruction from the application that the transaction is complete, ensure persistence of the transaction record in the transaction log, ensure persistence of changes made to the read-write copy, update a file mapping associated with the read-only memory block to point to the read-write copy, and record completion of the transaction.

2. The system of claim 1, comprising a failure recovery module to, upon detecting a failure of an aspect of the system prior to recording completion of the transaction, restore to a prior state at least one of a page table entry and a file mapping.

3. The system of claim 1, comprising a transaction merging module to merge the transaction with a second transaction when a second application sends a store instruction for modify the read-only memory block associated with the second transaction.

4. The system of claim 3, where the transaction completion module acts after receiving both an instruction from the application that the transaction is complete and an instruction from the second application that the second transaction is complete.

5. The system of claim 1, where the persistent memory is one of phase-change memory, spin-transfer torque memory, resistive random-access memory, and memristor.

6. The system of claim 1, comprising a volatile memory, and where ensuring persistence of changes made to the read-write copy involves flushing changes made to a version of the read-write copy in the volatile memory to the read-write copy in the persistent memory.

7. A method, comprising:

mapping a first page of a persistent memory to an application'"'"'s virtual address space in a read-only mode;

receiving a first store instruction associated with the first page from the application;

copying the first page to a new page of the persistent memory;

updating the application'"'"'s virtual address space to a location of the new page in the persistent memory in a read-write mode;

executing the first store instruction on the new page;

updating a file mapping in the persistent memory from a location of the first page to the location of the new page; and

updating the application'"'"'s virtual address space for the location of the new page to a read-only mode.

8. The method of claim 7, comprising:

receiving a second store instruction associated with the first page from the application; and

executing the second store instruction on the new page.

9. The method of claim 7, comprising:

recording initiation of a first transaction in a transaction log of the persistent memory;

recording, in association with the first transaction, the address of the first page and the address of the new page; and

recording completion of the first transaction.

10. The method of claim 9, comprising:

receiving, in association with a second transaction, a second store instruction associated with the first page; and

merging the first transaction and the second transaction.

11. The method of claim 10, where recording completion of the first transaction is delayed until both the first transaction and the second transaction are completed.

12. A non-transitory computer-readable medium storing processor executable instructions that, when executed, control the processor to:

record, based on a signal received from an application, initiation of a transaction;

receive, from an application, a store instruction targeting a read-only page of a persistent memory;

create, in the persistent memory, a read-write copy of the read-only page;

record, in association with the transaction, identifiers for the read-only page and the read-write copy;

receive, from the application, an indication of completion of the transaction;

finalize changes made to the read-write copy;

set the read-write copy to a read-only mode;

update an address associated with the read-only page to an address associated with the read-write copy; and

record completion of the transaction.

13. The non-transitory computer-readable medium of claim 12, where the instructions further control the processor to:

recover from a crash prior to recording completion of the transaction by reverting an address associated with the read-write copy to an address associated with the read-only page.

14. The non-transitory computer-readable medium of claim 12, where finalizing changes made to the read-write copy includes flushing changes from a version of the read-write copy held in a volatile memory to the read-write copy in the persistent memory.

15. The non-transitory computer-readable medium of claim 12, where the instructions further control the processor to:

update a virtual memory address of the application storing an address of the read-only page to an address of with the read-write copy; and

update the virtual memory address to signify that the read-write copy has been set to the read-only mode.