METHODS AND APPARATUSES FOR SELF-TRIMMING OF A SEMICONDUCTOR DEVICE

• US 20190311773A1
• Filed: 04/05/2018
• Published: 10/10/2019
• Est. Priority Date: 04/05/2018
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Jimenez-Olivares, Miguel, Kuzmenka, Maksim
• Granted Patent: US 10,600,494 B2
• Time in Patent Office: Days
• CPC Class Codes: G11C 11/4074 Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
• CPC Class Codes: G11C 2207/2254 Calibration
• CPC Class Codes: G11C 29/021 in voltage or current generators
• CPC Class Codes: G11C 29/028 with adaption or trimming of parameters
• CPC Class Codes: G11C 29/50008 of impedance
• CPC Class Codes: G11C 5/147 Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops G11C5/141 takes precedence

Abstract

Methods and apparatuses are provided for self-trimming of a semiconductor device. An example apparatus includes a semiconductor device including a self-trimming circuit configured to receive a reference voltage and a test command signal. The self-trimming circuit is configured to convert the reference voltage to a target voltage based on the test command signal and further configured to adjust a voltage trim code until an internal voltage matches the target voltage to determine a trim level associated with the internal voltage.

Claims

1. An apparatus comprising:

a semiconductor device comprising a self-trimming circuit configured to receive a reference voltage and a test command signal, the self-trimming circuit configured to convert the reference voltage to a target voltage based on the test command signal and further configured to adjust a voltage trim code until an internal voltage matches the target voltage to determine a trim level associated with the internal voltage.

2. The apparatus of claim 1, wherein the self-trimming circuit comprises a reference voltage regulator configured to adjust an output voltage in response to the voltage trim code, wherein the output voltage is the internal voltage.

3. The apparatus of claim 1, wherein the self-trimming circuit comprises a control circuit configured to decode the test command signal to determine a target voltage code, wherein the target voltage code is used to determine the target voltage.

4. The apparatus of claim 3, wherein the self-trimming circuit further comprises a digital-to-analog converter configured to receive the reference voltage and to convert the reference voltage to the target voltage based on the target voltage code.

5. The apparatus of claim 3, wherein the self-trimming circuit further comprises a comparator configured to compare the target voltage with the internal voltage and to provide a stop signal having a value based on the comparison, wherein the control circuit is configured to adjust the voltage trim code based on a value of the stop signal.

6. The apparatus of claim 3, wherein the control circuit is configured to decode the test command signal to retrieve selection of one of a custom target voltage code or a default target voltage code as the target voltage code.

7. The apparatus of claim 6, wherein the self-trimming circuit further comprises a metal option bank configured to provide the default target voltage code based on a voltage identifier in the test command signal.

8. The apparatus of claim 6, wherein the control circuit is configured to decode the test command signal to retrieve the custom target voltage code.

9. A self-trimming circuit of a semiconductor device comprising:

a control circuit configured to, during a self-trimming operation, decode a test command signal to set a target voltage and set a voltage trim code to an initial value, wherein the control circuit is further configured to adjust a value of the voltage trim code based on a stop signal;

a reference voltage regulator configured to receive the voltage trim code and to convert a band-gap reference voltage to an output voltage based on the voltage trim code; and

a comparator configured to compare the target voltage with the output voltage and to provide the stop signal having a value based on the comparison.

10. The self-trimming circuit of the semiconductor device of claim 9, further comprising a digital-to-analog converter configured to receive a target voltage code and a reference voltage and to convert the reference voltage to the target voltage based on the target voltage, wherein the control circuit is configured to determine the target voltage code based on the test command signal.

11. The self-trimming circuit of the semiconductor device of claim 9, further comprising an anti-fuse bank comprising a set of anti-fuses, wherein the control circuit is further configured to program the anti-fuse bank with a value of the voltage trim code that resulted in the output voltage matching the target voltage.

12. The self-trimming circuit of the semiconductor device of claim 9, wherein the control circuit further comprises a test command decoder configured to decode the test command signal to determine a voltage identifier, wherein the control circuit is configured to set the initial value of the voltage trim code based on the voltage identifier.

13. The self-trimming circuit of the semiconductor device of claim 12, wherein the control circuit further comprises a multiplexer configured to receive a default target voltage code and a custom voltage code and to provide one of the default target voltage code and the custom voltage code as the target voltage code based on a control signal from the test command decoder, wherein the test command decoder is configured to decode the test command signal to determine selection of the default target voltage code and the custom voltage code and to set a value of the control signal based on the selection.

14. The self-trimming circuit of the semiconductor device of claim 13, further comprising a metal option bank configured to provide the default target voltage code based on the voltage identifier.

15. The self-trimming circuit of the semiconductor device of claim 9, wherein the reference voltage regulator includes a variable impedance device having an impedance based on a value of the voltage trim code.

16. A method comprising:

receiving a reference voltage and a test command signal at a semiconductor device;

converting the reference voltage to a target voltage based on the test command signal at the semiconductor device; and

adjusting a voltage trim code until an internal voltage matches the target voltage to determine a trim level associated with the internal voltage.

17. The method of claim 16, further comprising adjusting an output voltage of a voltage regulator in response to the voltage trim code, wherein the output voltage is the internal voltage.

18. The method of claim 16, further comprising decoding the test command signal to determine a target voltage code, wherein the target voltage code is used to determine the target voltage.

19. The method of claim 18, further comprising:

comparing the target voltage with the internal voltage; and

providing a stop signal having a value based on the comparison, wherein adjustment of the voltage trim code is based on a value of the stop signal.

20. The method of claim 18, further comprising decoding the test command signal to retrieve selection of one of a custom target voltage code or a default target voltage code as the target voltage code.