WIRING BOARD AND SEMICONDUCTOR DEVICE

• US 20190312003A1
• Filed: 03/15/2019
• Published: 10/10/2019
• Est. Priority Date: 04/05/2018
• Status: Active Grant

• Current Assignee: Shinko Electric Industries Company Limited (Fujitsu Limited)
• Original Assignee: Shinko Electric Industries Company Limited (Fujitsu Limited)
• Inventors: TAKEUCHI, Hirofumi
• Granted Patent: US 10,790,256 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 21/4846 Leads on or in insulating or insulated substrates, e.g. metallisation H01L21/4821 takes precedence; metallisation of ceramics in general C04B41/51; printed circuits H05K3/00
• CPC Class Codes: H01L 21/4853 Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
• CPC Class Codes: H01L 21/486 Via connections through the substrate with or without pins
• CPC Class Codes: H01L 21/561 Batch processing
• CPC Class Codes: H01L 21/565 Moulds
• CPC Class Codes: H01L 21/568 Temporary substrate used as encapsulation process aid H01L21/4832 and H01L21/566 take precedence
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 2221/68345 used as a support during the manufacture of self supporting substrates
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/13101 the principal constituent melting at a temperature of less than 400°C
• CPC Class Codes: H01L 2224/16235 the bump connector connecting to a via metallisation of the item
• CPC Class Codes: H01L 2224/214 Connecting portions
• CPC Class Codes: H01L 2224/81815 Reflow soldering
• CPC Class Codes: H01L 23/3128 the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 23/49816 Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 23/49827 Via connections through the substrates, e.g. pins going through the substrate, coaxial cables H01L23/49822, H01L23/49833, H01L23/4985, H01L23/49861 take precedence
• CPC Class Codes: H01L 23/5386 Geometry or layout of the interconnection structure
• CPC Class Codes: H01L 23/5389 the chips being integrally enclosed by the interconnect and support structures
• CPC Class Codes: H01L 24/13 of an individual bump connector
• CPC Class Codes: H01L 24/16 : of an individual bump connector
• CPC Class Codes: H01L 24/19 : Manufacturing methods of high density interconnect preforms
• CPC Class Codes: H01L 24/20 : Structure, shape, material or disposition of high density interconnect preforms
• CPC Class Codes: H01L 24/81 : using a bump connector
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/181 : Encapsulation

Abstract

A wiring board includes an insulator layer, and a connection terminal having a first surface and a side surface intersecting the first surface. The first surface is exposed from the insulator layer, and the insulator layer includes a gap formed along at least a part of the side surface.

Claims

1. A wiring board comprising:

an insulator layer; and

a connection terminal having a first surface, and a side surface intersecting the first surface,

wherein the first surface is exposed from the insulator layer, and

the insulator layer includes a gap formed along at least a part of the side surface.

2. The wiring board as claimed in claim 1, wherein the gap is formed around an entire periphery of the side surface.

3. The wiring board as claimed in claim 1, wherein a diameter of the connection terminal gradually decreases in a direction that separates more from the first surface.

4. The wiring board as claimed in claim 1, wherein the first surface is located at a position deeper than a surface of the insulator layer.

5. The wiring board as claimed in claim 1, further comprising:

a conductor layer provided within the insulator layer and connected to the connection terminal,

wherein the conductor layer is exposed from a first surface of the insulator layer located on an opposite side from a second surface of the insulator layer exposing the connection terminal.

6. A semiconductor device comprising:

a wiring board according to claim 1; and

a semiconductor chip mounted on the wiring board,

wherein the semiconductor chip includes an electrode pad connected to the connection terminal.

7. The semiconductor device as claimed in claim 6, wherein the gap is formed around an entire periphery of the side surface of the connection terminal.

8. The semiconductor device as claimed in claim 6, wherein a diameter of the connection terminal gradually decreases in a direction that separates more from the first surface of the connection terminal.

9. The semiconductor device as claimed in claim 6, wherein the first surface of the connection terminal is located at a position deeper than a first surface of the insulator layer.

10. The semiconductor device as claimed in claim 6, wherein the wiring board further includes a conductor layer provided within the insulator layer and connected to the connection terminal,

wherein the conductor layer is exposed from a first surface of the insulator layer located on an opposite side from a second surface of the insulator layer exposing the connection terminal.