REDUCING PARASITIC CAPACITIES IN A MICROELECTRONIC DEVICE
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Accused Products
Abstract
A microelectronic device including a substrate including, in a stack, a base portion, a dielectric portion and an upper layer with a semi-conductive material base, at least one electrical connection element made of an electrically conductive material located above the upper layer and electrically insulated from the upper layer at least by a dielectric layer, the dielectric layer being in contact with the surface of the upper layer, at least one dielectric element including at least one trench forming a closed edge at the periphery or upright of at least one portion of the dielectric electrical connection element, located at least partially in the upper layer and delimiting a closed zone of said upper layer, at least one dielectric element having a portion exposed to the surface of the upper layer, device wherein the dielectric layer totally covers the exposed portion of at least one dielectric element.
0 Citations
44 Claims
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1-22. -22. (canceled)
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23. A microelectronic device comprising:
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a substrate comprising, in a stack, a base portion, a dielectric portion and an upper layer with a semi-conductive material base, at least one electrical connection element made of an electrically conductive material located above the upper layer and electrically insulated from the upper layer at least by a dielectric layer, the dielectric layer being in contact with the surface of the upper layer, at least one dielectric element comprising at least one trench forming a closed edge at the periphery or upright of at least one portion of the electrical connection element, located at least partially in the upper layer and delimiting a closed zone of said upper layer, at least one dielectric element having a portion exposed to the surface of the upper layer, wherein the dielectric layer totally covers the exposed portion of at least one dielectric element. - View Dependent Claims (24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40)
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41. A method for producing a microelectronic device comprising a substrate comprising, in a stack, a base portion, a dielectric portion and an upper layer with a semi-conductive material base, the method comprising:
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a formation of at least one dielectric element located at least partially in the upper layer, at least one dielectric element having a portion exposed to the surface of the upper layer, said at least dielectric element comprising at least one trench delimiting a closed zone of said upper layer, at the periphery or upright of at least one portion of the electrical connection element; a formation of a dielectric layer in contact with the surface of the upper layer and which totally covers the exposed portion of at least one dielectric element; a formation of at least one electrical connection element made of an electrically conductive material above the upper layer and electrically insulated from the upper layer at least by the dielectric layer. - View Dependent Claims (42, 43, 44)
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Specification