METHODS, SYSTEMS, ARTICLES OF MANUFACTURE AND APPARATUS TO SELECT CODE DATA STRUCTURE TYPES

• US 20190317844A1
• Filed: 06/26/2019
• Published: 10/17/2019
• Est. Priority Date: 06/26/2019
• Status: Abandoned Application

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Gottschlich, Justin, Alam, Mohammad Mejbah Ul, Zhou, Shengtian
• Application Number:
  US16/453,816
• Publication Number:
  US 20190317844A1
• Time in Patent Office: Days
• CPC Class Codes: G06F 11/302 where the computing system component is a software system
• CPC Class Codes: G06F 11/3409 for performance assessment
• CPC Class Codes: G06F 11/3447 Performance evaluation by modeling
• CPC Class Codes: G06F 11/3476 Data logging G06F11/14, G06F11/2205 take precedence
• CPC Class Codes: G06F 11/3684 for test design, e.g. generating new test cases
• CPC Class Codes: G06F 16/285 Clustering or classification
• CPC Class Codes: G06F 8/30 Creation or generation of source code
• CPC Class Codes: G06F 9/544 Buffers; Shared memory; Pipes
• CPC Class Codes: G06N 3/044 Recurrent networks, e.g. Hopfield networks
• CPC Class Codes: G06N 3/045 Combinations of networks
• CPC Class Codes: G06N 3/08 Learning methods

Abstract

Methods, apparatus, systems and articles of manufacture are disclosed to select code data structure types. An example disclosed apparatus includes an application programming interface (API) engine to generate an abstract data structure (ADS) placeholder in a location of a code sample corresponding to a memory operation, and a data structure selector to select a first candidate data structure having a first candidate data structure type, the first candidate data structure to service the memory operation of the ADS placeholder. The example apparatus also includes a workload engine to select a first candidate workload type to be processed by the selected first candidate data structure, and an execution logger to log first code performance metrics during execution of the code sample during a first iteration corresponding to the first candidate data structure type and the first candidate workload type, and log second code performance metrics during execution of the code sample during a second duration corresponding to a second candidate data structure type and the first candidate workload type. The example apparatus also includes a classification engine to select one of the first candidate data structure type or the second candidate data structure type based on a relative ranking of the first and second code performance metrics.

Claims

1. An apparatus to select a data structure type, the apparatus comprising:

an application programming interface (API) engine to generate an abstract data structure (ADS) placeholder in a location of a code sample corresponding to a memory operation;

a data structure selector to select a first candidate data structure having a first candidate data structure type, the first candidate data structure to service the memory operation of the ADS placeholder;

a workload engine to select a first candidate workload type to be processed by the selected first candidate data structure;

an execution logger to;

log first code performance metrics during execution of the code sample during a first iteration corresponding to the first candidate data structure type and the first candidate workload type; and

log second code performance metrics during execution of the code sample during a second duration corresponding to a second candidate data structure type and the first candidate workload type; and

a classification engine to select one of the first candidate data structure type or the second candidate data structure type based on a relative ranking of the first and second code performance metrics.

2. The apparatus as defined in claim 1, further including a data sequence generator to:

generate a first sequence of operational data corresponding to the first candidate data structure type; and

generate a second sequence of operational data corresponding to the second candidate data structure type.

3. The apparatus as defined in claim 2, further including a sequence normalizer to generate a fixed length representation of respective ones of the first sequence of operational data and the second sequence of operational data.

4. The apparatus as defined in claim 3, wherein the sequence normalizer is to invoke a long short-term memory (LSTM) neural network.

5. The apparatus as defined in claim 1, wherein the workload engine is to select a second candidate workload type for respective ones of the first candidate data structure type and the second candidate data structure type.

6. The apparatus as defined in claim 5, wherein the workload engine is to select different data quantity volumes for respective ones of the first and second candidate workload types.

7. The apparatus as defined in claim 1, further including a code entry detector to identify the memory operation in the code sample.

8. A non-transitory computer readable storage medium comprising computer readable instructions that, when executed, cause at least one processor to at least:

generate an abstract data structure (ADS) placeholder in a location of a code sample corresponding to a memory operation;

select a first candidate data structure having a first candidate data structure type, the first candidate data structure to service the memory operations of the ADS placeholder;

select a first candidate workload type to be processed by the selected first candidate data structure;

log first code performance metrics during execution of the code sample during a first iteration corresponding to the first candidate data structure type and the first candidate workload type;

log second code performance metrics during execution of the code sample during a second duration corresponding to a second candidate data structure type and the first candidate workload type; and

select one of the first candidate data structure type or the second candidate data structure type based on a relative ranking of the first and second code performance metrics.

9. The non-transitory computer readable storage medium as defined in claim 8, wherein the instructions, when executed, cause the at least one processor to:

generate a first sequence of operational data corresponding to the first candidate data structure type; and

generate a second sequence of operational data corresponding to the second candidate data structure type.

10. The non-transitory computer readable storage medium as defined in claim 9, wherein the instructions, when executed, cause the at least one processor to generate a fixed length representation of respective ones of the first sequence of operational data and the second sequence of operational data.

11. The non-transitory computer readable storage medium as defined in claim 10, wherein the instructions, when executed, cause the at least one processor to invoke a long short-term memory (LSTM) neural network.

12. The non-transitory computer readable storage medium as defined in claim 8, wherein the instructions, when executed, cause the at least one processor to select a second candidate workload type for respective ones of the first candidate data structure type and the second candidate data structure type.

13. The non-transitory computer readable storage medium as defined in claim 12, wherein the instructions, when executed, cause the at least one processor to select different data quantity volumes for respective ones of the first and second candidate workload types.

14. The non-transitory computer readable storage medium as defined in claim 8, wherein the instructions, when executed, cause the at least one processor to identify the memory operation in the code sample.

15. A computer-implemented method to select a data structure type, the method comprising:

generating, by executing an instruction with at least one processor, an abstract data structure (ADS) placeholder in a location of a code sample corresponding to a memory operation;

selecting, by executing an instruction with the at least one processor, a first candidate data structure having a first candidate data structure type, the first candidate data structure to service the memory operations of the ADS placeholder;

selecting, by executing an instruction with the at least one processor, a first candidate workload type to be processed by the selected first candidate data structure;

logging, by executing an instruction with the at least one processor, first code performance metrics during execution of the code sample during a first iteration corresponding to the first candidate data structure type and the first candidate workload type;

logging, by executing an instruction with the at least one processor, second code performance metrics during execution of the code sample during a second duration corresponding to a second candidate data structure type and the first candidate workload type; and

selecting, by executing an instruction with the at least one processor, one of the first candidate data structure type or the second candidate data structure type based on a relative ranking of the first and second code performance metrics.

16. The method as defined in claim 15, further including:

generating a first sequence of operational data corresponding to the first candidate data structure type; and

generating a second sequence of operational data corresponding to the second candidate data structure type.

17. The method as defined in claim 16, further including generating a fixed length representation of respective ones of the first sequence of operational data and the second sequence of operational data.

18. The method as defined in claim 17, further including invoking a long short-term memory (LSTM) neural network.

19. The method as defined in claim 15, further including selecting a second candidate workload type for respective ones of the first candidate data structure type and the second candidate data structure type.

20. The method as defined in claim 19, further including selecting different data quantity volumes for respective ones of the first and second candidate workload types.

21. The method as defined in claim 15, further including identifying the memory operation in the code sample.