MULTI-LAYER CERAMIC CAPACITOR AND METHOD OF PRODUCING THE SAME

• US 20190318872A1
• Filed: 03/28/2019
• Published: 10/17/2019
• Est. Priority Date: 04/11/2018
• Status: Active Grant

• Current Assignee: Taiyo Yuden Company Limited (Taiyo Yuden Co)
• Original Assignee: Taiyo Yuden Company Limited (Taiyo Yuden Co)
• Inventors: MIZUNO, KOTARO
• Granted Patent: US 11,049,652 B2
• Time in Patent Office: Days
• CPC Class Codes: H01G 4/012 Form of non-self-supporting electrodes
• CPC Class Codes: H01G 4/12 Ceramic dielectrics H01G4/085 takes precedence
• CPC Class Codes: H01G 4/224 Housing; Encapsulation
• CPC Class Codes: H01G 4/232 electrically connecting two or more layers of a stacked or rolled capacitor
• CPC Class Codes: H01G 4/30 Stacked capacitors H01G4/33 takes precedence

Abstract

A multi-layer ceramic capacitor includes: a ceramic body including a multi-layer chip and a side margin, the multi-layer chip including a capacitance forming unit including internal electrodes laminated in a first direction, positions of end portions of the internal electrodes in a second direction orthogonal to the first direction being aligned with one another within a range of 0.5 and a cover covering the capacitance forming unit in the first direction, the side margin covering the multi-layer chip in the second direction, the ceramic body having a main surface facing in the first direction, a side surface facing in the second direction, an end surface facing in a third direction orthogonal to the above directions, and a corner portion connecting those surfaces; and an external electrode covering the end surface and the corner portion, the corner portion having a surface roughness of 30 nm or more.

Claims

1. A multi-layer ceramic capacitor, comprising:

a ceramic body including

a multi-layer chip including

a capacitance forming unit including internal electrodes laminated in a first direction, positions of end portions of the internal electrodes in a second direction being aligned with one another within a range of 0.5 μ

m in the second direction, the second direction being orthogonal to the first direction, and

a cover that covers the capacitance forming unit in the first direction, and

a side margin that covers the multi-layer chip in the second direction,

the ceramic body having a main surface facing in the first direction, a side surface facing in the second direction, an end surface facing in a third direction orthogonal to the first direction and the second direction, and a corner portion that connects the main surface, the side surface, and the end surface to one another; and

an external electrode that covers the end surface and the corner portion,

the corner portion having a surface roughness Ra of 30 nm or more.

2. The multi-layer ceramic capacitor according to claim 1, wherein

the corner portion has the surface roughness Ra of 300 nm or less.

3. The multi-layer ceramic capacitor according to claim 1, wherein

the external electrode has a thickness dimension along the third direction on the end surface, the thickness dimension being 10 μ

m or less.

4. The multi-layer ceramic capacitor according to claim 1, wherein

the side margin has a thickness dimension along the second direction, the thickness dimension being 20 μ

m or less.

5. The multi-layer ceramic capacitor according to claim 1, wherein

the cover has a thickness dimension along the first direction, the thickness dimension being 20 μ

m or less.

6. A method of producing a multi-layer ceramic capacitor, the multi-layer ceramic capacitor including a ceramic body and an external electrode, the ceramic body having a main surface facing in a first direction, a side surface facing in a second direction orthogonal to the first direction, an end surface facing in a third direction orthogonal to the first direction and the second direction, and a corner portion that connects the main surface, the side surface, and the end surface to one another, the external electrode covering the end surface and the corner portion of the ceramic body, the method comprising:

cutting a multi-layer sheet produced by laminating ceramic sheets in the first direction, the ceramic sheets including internal electrodes, to produce a multi-layer chip including a capacitance forming unit that includes the internal electrodes laminated in the first direction, a cover that covers the capacitance forming unit in the first direction, and a cut surface that faces in the second direction, end portions of the internal electrodes being exposed from the cut surface;

pressing and punching a ceramic sheet for forming a side margin in the second direction by the cut surface of the multi-layer chip, to form a side margin on the cut surface of the multi-layer chip;

sintering the multi-layer chip on which the side margin is formed, to produce the ceramic body in which the corner portion has a surface roughness Ra of 30 nm or more; and

immersing the end surface and the corner portion of the ceramic body into an electrically conductive paste, to form the external electrode.

7. The method of producing a multi-layer ceramic capacitor according to claim 6, wherein

the multi-layer chip on which the side margin is formed is subjected to barrel polishing and is sintered, to produce the ceramic body.