Post UV Cure for Gapfill Improvement

• US 20190318932A1
• Filed: 06/24/2019
• Published: 10/17/2019
• Est. Priority Date: 03/14/2018
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Yu, De-Wei, Chen, Chien-Hao, Peng, Chih-Tang, Chen, Jei Ming, Wang, Shu-Yi
• Granted Patent: US 10,727,064 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 21/02348 treatment by exposure to UV light
• CPC Class Codes: H01L 21/0243 Surface structure
• CPC Class Codes: H01L 21/02488 Insulating materials
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/28035 the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities H01L21/28105 takes precedence
• CPC Class Codes: H01L 21/32055 Deposition of semiconductive layers, e.g. poly - or amorphous silicon layers
• CPC Class Codes: H01L 21/32137 of silicon-containing layers
• CPC Class Codes: H01L 21/823431 with a particular manufacturing method of transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/66545 using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
• CPC Class Codes: H01L 29/66795 with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/785 having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET

Abstract

Embodiments disclosed herein relate generally to forming a gate layer in high aspect ratio trenches using a cyclic deposition-etch process. In an embodiment, a method for semiconductor processing is provided. The method includes performing a first deposition process to form a conformal film over a bottom surface and along sidewall surfaces of a feature on a substrate. The method includes performing an etch process to remove a portion of the conformal film. The method includes repeating the first deposition process and the etch process to fill the feature with the conformal film. The method includes exposing the conformal film to ultraviolet light.

Claims

1. A method for semiconductor processing, the method comprising:

performing a first deposition process to form a layer of a first material in a trench, the trench being between a first structure and a second structure;

performing an etch process to remove a portion of the first material along an upper portion of sidewall surfaces of the trench;

repeating the first deposition process and the etch process one or more times, wherein the trench is filled after repeating the first deposition process and the etch process one or more times;

curing the first material; and

after curing the first material, performing a second deposition process to form the first material to a first depth above an upper surface of the first structure and the second structure.

2. The method of claim 1, wherein curing comprises a UV curing process.

3. The method of claim 2, wherein the curing is performed at an ambient temperature of about 250°

C. to about 450°

C.

4. The method of claim 1, wherein the first deposition process comprises a low-pressure chemical vapor deposition (LPCVD) process.

5. The method of claim 4, wherein a temperature of the LPCVD process is in a range from about 120°

C. to about 550°

C.

6. The method of claim 5, wherein a silicon-containing precursor of the LPCVD process comprises SiH₄, Si₂H₆, Si₂H₂Cl₂, SiHCl₃, Si₂Cl₆, or a combination thereof.

7. The method of claim 6, wherein a flow rate of the silicon-containing precursor is less than or equal to about 2 standard liters per minute (sLm).

8. The method of claim 7, wherein a pressure of the LPCVD process is less than or equal to about 1 Torr.

9. A method for semiconductor processing, the method comprising:

forming fins on a substrate, sidewalls of the fins and a bottom surface between the sidewalls of the fins defining a trench therebetween;

forming a semiconductor layer in the trench and over the fins, forming the semiconductor layer comprising;

performing a plurality of first deposition cycles and a plurality of etch cycles, each of the first deposition cycles being followed by an etch cycle of the plurality of etch cycles;

after performing the plurality of first deposition cycles and the plurality of etch cycles, curing the semiconductor layer; and

after curing, performing a second deposition cycle.

10. The method of claim 9, wherein the trench is completely filled prior to performing the second deposition cycle.

11. The method of claim 9, wherein the plurality of first deposition cycles and the plurality of etch cycles are performed in a same process chamber, and further comprising performing a purge between each of the first deposition cycles and the following etch cycle.

12. The method of claim 11, wherein at least some of the plurality of etch cycles removes at least some of the semiconductor layer from an upper sidewall of the trench.

13. The method of claim 9, wherein each of the plurality of first deposition cycles deposits a layer having a thickness in a range from about 10 Angstroms to about 100 Angstroms.

14. The method of claim 9, wherein after performing the second deposition cycle, the semiconductor layer has a thickness above the fins in a range from about 100 nm to about 300 nm.

15. The method of claim 9, wherein curing removes one or more voids in the semiconductor layer.

16. The method of claim 9 further comprising forming a dielectric layer along sidewalls and a bottom of the trench prior to forming the semiconductor layer.

17. A method for semiconductor processing, the method comprising:

forming a trench interposed between a first fin and a second fin;

forming a semiconductor layer over the first fin and the second fin, wherein forming the semiconductor layer comprises;

performing a first deposition process to form a layer of a first material in the trench;

performing an etch process to remove a portion of the first material in the trench;

repeating the first deposition process and the etch process one or more times;

curing the first material to reduce a number of voids in the first material; and

after curing the first material, performing a second deposition process to form another layer of the first material.

18. The method of claim 17, wherein the curing is an ultraviolet curing process.

19. The method of claim 18, wherein the curing is performed at an ambient temperature of about 250°

C. to about 450°

C.

20. The method of claim 17, wherein trench is completely filled with the first material prior to curing.