SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
First Claim
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1. A semiconductor device comprising:
- a substrate;
a first impurity region of a first conductivity type on the substrate;
a second impurity region of a second conductivity type on the substrate to be adjacent to the first impurity region;
a first semiconductor layer of the second conductivity type on the first impurity region;
a second semiconductor layer of the first conductivity type on the second impurity region;
a first buried insulation layer on the first semiconductor layer;
a second buried insulation layer on the second semiconductor layer;
a third semiconductor layer on the first buried insulation layer;
a fourth semiconductor layer on the second buried insulation layer;
a first transistor and a second transistor on the first semiconductor layer, respectively;
a third transistor on the second semiconductor layer;
a first element isolation layer which separates the second transistor and the third transistor; and
a second element isolation layer which separates the first transistor and the second transistor and is shallower than the first element isolation layer.
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Abstract
A semiconductor comprises two transistors of the first conductivity type separated from two transistors of a second conductivity type by a first element isolation layer. Further, the two transistors of the first conductivity type are separated from each other by a second element isolation layer and the two transistors of the second conductivity type are separated from each other by a third element isolation layer. In example embodiments, the second and third element isolation layers are shallower than the first element isolation layer.
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Citations
28 Claims
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1. A semiconductor device comprising:
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a substrate; a first impurity region of a first conductivity type on the substrate; a second impurity region of a second conductivity type on the substrate to be adjacent to the first impurity region; a first semiconductor layer of the second conductivity type on the first impurity region; a second semiconductor layer of the first conductivity type on the second impurity region; a first buried insulation layer on the first semiconductor layer; a second buried insulation layer on the second semiconductor layer; a third semiconductor layer on the first buried insulation layer; a fourth semiconductor layer on the second buried insulation layer; a first transistor and a second transistor on the first semiconductor layer, respectively; a third transistor on the second semiconductor layer; a first element isolation layer which separates the second transistor and the third transistor; and a second element isolation layer which separates the first transistor and the second transistor and is shallower than the first element isolation layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A semiconductor device comprising:
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a substrate; a first impurity region of a first conductivity type and a second impurity region of a second conductivity type in contact with each other on the substrate; a first semiconductor layer of the second conductivity type on the first impurity region; a second semiconductor layer of the first conductivity type on the second impurity region; a buried insulation layer on the first semiconductor layer and the second semiconductor layer; a third semiconductor layer overlapping the first semiconductor layer, and a fourth semiconductor layer overlapping the second semiconductor layer on the buried insulation layer; a first element isolation layer in the third semiconductor layer; and a second element isolation layer which completely separates the first semiconductor layer and the second semiconductor layer. - View Dependent Claims (15, 16, 17, 18)
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19-24. -24. (canceled)
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25. A semiconductor device comprising:
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a substrate; a first impurity region of a first conductivity type on the substrate; a second impurity region of a second conductivity type on the substrate to be adjacent to the first impurity region; a first semiconductor layer of the second conductivity type on the first impurity region; a second semiconductor layer of the first conductivity type on the second impurity region; a first buried insulation layer on the first semiconductor layer; a second buried insulation layer on the second semiconductor layer; a third semiconductor layer on the first buried insulation layer; a fourth semiconductor layer on the second buried insulation layer; a first transistor on the first semiconductor layer; a second transistor on the second semiconductor layer; a first element isolation layer which separates the first transistor and the second transistor; a second element isolation layer in the third semiconductor layer shallower than the first element isolation layer; and a first well contact connected to the first semiconductor layer, the first well contact not between the first transistor and the first element isolation layer. - View Dependent Claims (26)
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27. (canceled)
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28. (canceled)
Specification