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NONVOLATILE CHARGE TRAP MEMORY DEVICE HAVING A DEUTERATED LAYER IN A MULTI-LAYER CHARGE-TRAPPING REGION

  • US 20190319104A1
  • Filed: 03/12/2019
  • Published: 10/17/2019
  • Est. Priority Date: 05/25/2007
  • Status: Abandoned Application
First Claim
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1. A charge trap memory device, comprising:

  • a substrate having a source region, a drain region, and a channel region electrically connecting the source region and drain region;

    a tunnel dielectric layer disposed above the substrate over the channel region; and

    a multi-layer charge-trapping region including a first deuterated layer disposed on the tunnel dielectric layer, a first nitride layer disposed on the first deuterated layer and a second nitride layer disposed above the first nitride layer

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