THIN FILM TRANSISTOR, SENSOR, BIOLOGICAL DETECTION DEVICE AND METHOD

• US 20190323987A1
• Filed: 01/03/2019
• Published: 10/24/2019
• Est. Priority Date: 04/24/2018
• Status: Active Grant

• Current Assignee: BOE Technology Group Co., Ltd.
• Original Assignee: BOE Technology Group Co., Ltd.
• Inventors: MA, Xiaochen
• Granted Patent: US 10,823,697 B2
• Time in Patent Office: Days
• CPC Class Codes: G01N 27/4145 specially adapted for biomolecules, e.g. gate electrode with immobilised receptors
• CPC Class Codes: H01L 29/78648 arranged on opposing sides of the channel

Abstract

The present disclosure provides a thin film transistor, a sensor, a biological detection device and a method. The thin film transistor includes a substrate, a first gate, a first dielectric layer, a source, a drain, a semiconductor layer, a second dielectric layer, and a second gate. The first gate is on the substrate. The first dielectric layer is on the substrate and the first gate. The source, the drain, and the semiconductor layer are on a side of the first dielectric layer facing away from the first gate. The second dielectric layer is on the first dielectric layer and the semiconductor layer. A material of the second dielectric layer is a solid state electrolyte material. The second gate is on a side of the second dielectric layer facing away from the semiconductor layer.

Claims

1. A thin film transistor, comprising:

a substrate;

a first gate on the substrate;

a first dielectric layer on the substrate and the first gate, wherein an orthographic projection of the first gate on the substrate is within an orthographic projection of the first dielectric layer on the substrate;

a source, a drain, and a semiconductor layer on a side of the first dielectric layer facing away from the first gate, the source and the drain being respectively connected to the semiconductor layer, both an orthographic projection of the source on the substrate and an orthographic projection of the drain on the substrate being within an orthographic projection of the semiconductor layer on the substrate;

a second dielectric layer on the first dielectric layer and the semiconductor layer, a material of the second dielectric layer being a solid state electrolyte material, wherein the orthographic projection of the semiconductor layer on the substrate is within an orthographic projection of the second dielectric layer on the substrate; and

a second gate on a side of the second dielectric layer facing away from the semiconductor layer.

2. The thin film transistor according to claim 1, further comprising:

a first port layer above the substrate, the first port layer being spaced apart from the first gate; and

a second port layer connected to the second gate, the second port layer being isolated from the first port layer by the first dielectric layer.

3. The thin film transistor according to claim 2, wherein

a material of the first port layer is the same as a material of the first gate, and the first port layer is in the same layer as the first gate;

a material of the second port layer is the same as a material of the second gate, and the second port layer is in the same layer as the second gate.

4. The thin film transistor according to claim 2, further comprising:

a cover layer on the second gate and the second port layer.

5. The thin film transistor according to claim 1, wherein

the solid state electrolyte material comprises at least one of an organic polyelectrolyte material and an inorganic electrolyte material.

6. The thin film transistor according to claim 1, wherein

the source and the drain are between the semiconductor layer and the first dielectric layer;

or

the source and the drain are on a side of the semiconductor layer facing away from the first dielectric layer.

7. A sensor, comprising:

the thin film transistor of claim 2.

8. The sensor according to claim 7, further comprising a detection unit, wherein the detection unit comprises:

a first detection portion electrically connected to the first port layer of the thin film transistor; and

a second detection portion electrically connected to the second port layer of the thin film transistor.

9. The sensor according to claim 7, further comprising:

a capping plate disposed opposite to the substrate of the thin film transistor and above the second gate; and

an encapsulation portion between the capping plate and the substrate;

wherein, the capping plate, the encapsulation portion and the thin film transistor enclose a flow passage, the first port layer and the second port layer of the thin film transistor respectively abutting the flow passage.

10. A biological detection device, comprising the thin film transistor of claim 1.

11. A biological detection device, comprising the sensor of claim 7.

12. A method of manufacturing a thin film transistor, comprising:

forming a first gate on a substrate;

forming a first dielectric layer on the substrate and the first gate, wherein an orthographic projection of the first gate on the substrate is within an orthographic projection of the first dielectric layer on the substrate;

forming a source, a drain, and a semiconductor layer on a side of the first dielectric layer facing away from the first gate, the source and the drain being respectively connected to the semiconductor layer, both an orthographic projection of the source on the substrate and an orthographic projection of the drain on the substrate being within an orthographic projection of the semiconductor layer on the substrate;

forming a second dielectric layer on the first dielectric layer and the semiconductor layer, a material of the second dielectric layer being a solid state electrolyte material, wherein the orthographic projection of the semiconductor layer on the substrate is within an orthographic projection of the second dielectric layer on the substrate; and

forming a second gate on a side of the second dielectric layer facing away from the semiconductor layer.

13. The method according to claim 12, further comprising:

forming a first port layer above the substrate during formation of the first gate, the first port layer being spaced apart from the first gate; and

forming a second port layer connected to the second gate during formation of the second gate, wherein the second port layer is isolated from the first port layer by the first dielectric layer.

14. The method according to claim 13, wherein

the first port layer and the first gate are formed in the same patterning process;

the second port layer and the second gate are formed in the same patterning process.

15. The method according to claim 13, further comprising:

forming a cover layer on the second gate and the second port layer.

16. The method according to claim 12, wherein the step of forming the source, the drain and the semiconductor layer comprises:

forming the source and the drain on a side of the first dielectric layer facing away from the first gate; and

forming the semiconductor layer on the first dielectric layer, the source and the drain;

or

forming the semiconductor layer on the side of the first dielectric layer facing away from the first gate; and

forming the source and the drain on a side of the semiconductor layer facing away from the first dielectric layer.

17. A method of detecting a sample using a thin film transistor, wherein the thin film transistor comprises:

a substrate;

a first gate on the substrate;

a first dielectric layer on the substrate and the first gate;

a source, a drain, and a semiconductor layer on a side of the first dielectric layer facing away from the first gate, the source and the drain being respectively connected to the semiconductor layer;

a second dielectric layer on the first dielectric layer and the semiconductor layer, a material of the second dielectric layer being a solid state electrolyte material;

a second gate on a side of the second dielectric layer facing away from the semiconductor layer;

a first port layer above the substrate, the first port layer being spaced apart from the first gate; and

a second port layer connected to the second gate, the second port layer being isolated from the first port layer by the first dielectric layer;

the method comprising;

applying an adjustment voltage to the first gate such that the thin film transistor is in a sensitive working range;

connecting the first port layer and the second port layer to a sample to be detected, respectively;

applying a detection voltage to the first port layer; and

obtaining an output current from the source or the drain, and obtaining a detection result of the sample according to the output current.

18. The method according to claim 17, before applying an adjustment voltage to the first gate, the method further comprising:

obtaining the sensitive working range of the thin film transistor.

19. The method according to claim 18, wherein the step of obtaining the sensitive working range comprises:

applying a scan voltage (V_G) to the second gate;

obtaining a current (I_D) from the source or the drain to obtain an I_D-V_G characteristic curve regarding the current (I_D) and the scan voltage (V_G); and

determining a voltage range with a largest slope of curve from the I_D-V_G characteristic curve as the sensitive working range of the thin film transistor.