INTEGRATED LIGHT-EMITTING PIXEL ARRAYS BASED DEVICES BY BONDING

• US 20190324577A1
• Filed: 07/01/2019
• Published: 10/24/2019
• Est. Priority Date: 03/27/2018
• Status: Active Grant

• Current Assignee: Shaoher Pan
• Original Assignee: Shaoher Pan
• Inventors: Pan, Shaoher
• Granted Patent: US 10,884,560 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 2203/04102 Flexible digitiser, i.e. constructional details for allowing the whole digitising part of a device to be flexed or rolled like a sheet of paper
• CPC Class Codes: G06F 3/044 by capacitive means
• CPC Class Codes: H01L 23/5387 Flexible insulating substrates H01L23/5388 takes precedence
• CPC Class Codes: H01L 25/0753 the devices being arranged next to each other
• CPC Class Codes: H01L 25/167 comprising optoelectronic devices, e.g. LED, photodiodes
• CPC Class Codes: H01L 27/1218 with a particular composition or structure of the substrate
• CPC Class Codes: H01L 27/1222 with a particular composition, shape or crystalline structure of the active layer
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 27/1266 the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
• CPC Class Codes: H01L 29/78678 with inverted-type structure, e.g. with bottom gate
• CPC Class Codes: H01L 2933/0041 relating to wavelength conversion elements
• CPC Class Codes: H01L 2933/0058 relating to optical field-shaping elements
• CPC Class Codes: H01L 2933/0066 relating to arrangements for conducting electric current to or from the semiconductor body
• CPC Class Codes: H01L 2933/0083 Periodic patterns for optical field-shaping in or on the semiconductor body or semiconductor body package, e.g. photonic bandgap structures
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/06 within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• CPC Class Codes: H01L 33/32 containing nitrogen
• CPC Class Codes: H01L 33/405 Reflective materials
• CPC Class Codes: H01L 33/44 characterised by the coatings, e.g. passivation layer or anti-reflective coating
• CPC Class Codes: H01L 33/502 : Wavelength conversion materials
• CPC Class Codes: H01L 33/504 : Elements with two or more wavelength conversion materials
• CPC Class Codes: H01L 33/507 : the elements being in intimate contact with parts other than the semiconductor body or integrated with parts other than the semiconductor body
• CPC Class Codes: H01L 33/58 : Optical field-shaping elements
• CPC Class Codes: H01L 33/62 : Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Abstract

Integrated active-matrix light emitting pixel arrays based displays are provided. An example integrated device includes a backplane including pixel circuits conductively coupled to an array of light-emitting elements through intermediate conductive layers to form an array of active-matrix light-emitting pixels and a transparent conductive layer on the array of the light-emitting elements. Each of the light-emitting elements includes one or more quantum well semiconductor layers between a first contact electrode and a second contact electrode, and the first contact electrodes of the light-emitting elements is respectively bonded and conductively coupled to the pixel circuits in the backplane via the respective intermediate conductive layers. The transparent conductive layer is in contact with the second contact electrodes of the light-emitting elements to form a common electrode of the light-emitting elements, and a top surface of each of the second contact electrodes is fully in contact with the transparent conductive layer.

Claims

1. An integrated device comprising:

a backplane including a plurality of pixel circuits each conductively coupled to respective light-emitting elements through respective intermediate conductive layers to form an array of active-matrix light-emitting pixels, wherein each of the light-emitting elements comprises one or more quantum well semiconductor layers between a first contact electrode and a second contact electrode, the first contact electrodes of the light-emitting elements being respectively bonded and conductively coupled to the pixel circuits in the backplane via the respective intermediate conductive layers; and

a transparent conductive layer on the light-emitting elements, wherein the transparent conductive layer is in contact with the second contact electrodes of the light-emitting elements to form a common electrode of the light-emitting elements, a top surface of each of the second contact electrodes being fully in contact with the transparent conductive layer.

2. The integrated device of claim 1, further comprising:

isolation spacers between adjacent light emitting elements.

3. The integrated device of claim 2, wherein the isolation spacers comprises an opaque dielectric material.

4. The integrated device of claim 2, wherein side surfaces of each of the second contact electrodes are fully in contact with the isolation spacers.

5. The integrated device of claim 1, wherein each of the light-emitting elements has a size same as a respective intermediate conductive layer and is self-aligned with the respective intermediate conductive layer.

6. The integrated device of claim 1, wherein each of the pixel circuits comprises a non-volatile memory including at least one transistor conductively coupled to a corresponding drive electrode in a top layer of the backplane.

7. The integrated device of claim 6, wherein each of the light-emitting elements is conductively coupled to a respective pixel circuit by the first contact electrode of the light-emitting element bonded to the corresponding drive electrode of the respective pixel circuit through the respective intermediate conductive layer.

8. The integrated device of claim 7, wherein the light-emitting element is aligned with the corresponding bonded drive electrode in the top layer of the backplane, and a size of the light-emitting element is no smaller than a size of the corresponding bonded drive electrode.

9. The integrated device of claim 6, wherein the backplane comprises scanning drivers and data drivers, and each of the non-volatile memories is coupled to one of the scanning drivers through at least one word line and to one of the data drivers through at least one bit line.

10. The integrated device of claim 1, wherein each of the light-emitting elements is operable to emit light with a primary color,

wherein the integrated device further comprises:

for each of the active-matrix light emitting pixels, at least a phosphor film or a quantum dot film on the conductive layer above at least one light-emitting element in the pixel and operable to emit a secondary light when excited by the light with the primary color, wherein the secondary light has a second color different from the primary color.

11. The integrated device of claim 10, wherein a number of the LEDs is larger than a number of the LEDs deposited with the phosphor films or quantum dots films, and

wherein the number of the LEDs is equal to at least two times of a number of the pixels.

12. The integrated device of claim 10, wherein the one or more quantum well layers include Group III-V compounds and each of the light-emitting elements is operable as a light-emitting diode (LED) to emit light with a blue color, and

wherein, for each of the active-matrix light emitting pixels, at least two blue color LEDs are configured to optically excite at least two other colors by secondary light emission of the phosphor films or quantum dots films on the at least two blue color LEDs.

13. The integrated device of claim 12, wherein each of the active-matrix light emitting pixels is configured to be a multi-color display pixel including one blue color LED operable to provide a blue color and the at least two blue color LEDs with the phosphor films or quantum dots films operable to respectively provide a red color and a green color.

14. The integrated device of claim 13, wherein an area ratio between the three blue color LEDs in the multi-color display pixel is based on light conversion efficiencies of the red color phosphor film or quantum dots film and the green color phosphor film or quantum dots film when excited by the at least two blue color LEDs.

15. The integrated device of claim 10, wherein the one or more quantum well layers include Group III-V compounds and each of the light-emitting elements is operable as a light-emitting diode (LED) to emit ultraviolet (UV) or deep UV light, and

wherein, for each of the active-matrix light emitting pixels, at least three LEDs are configured to optically excite at least three colors by secondary light emission of the phosphor films or quantum dots films on the at least three LEDs.

16. The integrated device of claim 15, wherein each of the active-matrix light emitting pixels is configured to be a multi-color display pixel including the at least three LEDs with the phosphor films or quantum dots films operable to respectively provide at least a red color, a blue color, and a green color.

17. The integrated device of claim 16, wherein an area ratio between the three LEDs in the multi-color display pixel is based on light conversion efficiencies of the red color phosphor film or quantum dots film, the blue color phosphor film or quantum dot film and the green color phosphor film or quantum dots film when excited by the three LEDs.

18. The integrated device of claim 10, wherein the conductive layer comprises a transparent indium tin oxide (ITO) layer, and the transparent ITO layer is between the light-emitting elements and the at least one phosphor film or one quantum dot film.

19. The integrated device of claim 1, wherein each of the active-matrix light-emitting pixels is configured to be a multi-color display pixel including first and second pixel elements having respective first and second light conversion efficiencies to emit a first color and a second color when excited by the light-emitting elements, and

wherein the backplane is configured to drive the first and second pixel elements with respective first and second currents, and a current ratio between the first and second currents is based on a ratio between the first and second light conversion efficiencies.

20. The integrated device of claim 1, further comprising:

a touch-sensitive transparent protective layer on the array of active-matrix light-emitting pixels and configured to form, together with the common electrode, a capacitive touch screen position sensor; and

a polarizer film positioned between the touch-sensitive transparent protective layer and the array of active-matrix light-emitting pixels.

21. The integrated device of claim 1, wherein each of the respective intermediate conductive layers forms a highly-reflective mirror for a corresponding light-emitting element bonded with the respective intermediate conductive layer.

22. The integrated device of claim 21, wherein the mirror has a reflectivity higher than 80%.

23. The integrated device of claim 1, wherein the first contact electrode comprises a metal film with a high reflectivity and is configured to enhance a brightness of light emitted from the light-emitting element.

24. The integrated device of claim 1, wherein each of the active-matrix light-emitting pixels is operable to output a light flux in one direction that is larger than 80% of light flux in two directions output from each of the at least one light-emitting element in the pixel.

25. The integrated device of claim 1, wherein a ratio between an area of light emission from the pixels and a physical area of the pixels is higher than 50%.

26. The integrated device of claim 1, wherein the backplane comprises a complementary metal-oxide-semiconductor (CMOS) backplane.

27. The integrated device of claim 26, wherein the backplane is on a first side of a semiconductor substrate, and

wherein the device further comprises:

a conductive grid array package on a second, opposite side of the semiconductor substrate, the conductive grid array package being conductively coupled to the backplane.

28. The integrated device of claim 26, wherein each of the pixels includes at least one of:

a size less than 5.0 μ

m,

a respond time faster than 0.1 μ

s, or

an emitting light flux higher than 20 cd/mm{circumflex over ( 

)}2.

29. The integrated device of claim 26, comprising at least one of:

a thickness less than 1.0 mm, or

a device area larger than 50 mm×

50 mm.

30. The integrated device of claim 26, wherein the device is flexible.

31. The integrated device of claim 1, wherein the backplane comprises a low temperature polysilicon (LTPS) thin-film transistors (TFT) array control backplane.

32. The integrated device of claim 31, wherein the backplane is on a substrate, and

wherein the device further comprises:

a second LTPS TFT array control backplane on the substrate, the second backplane being adjacent to the backplane.

33. The integrated device of claim 31, wherein each of the pixels includes at least one of:

a size less than 10 μ

m,

a respond time faster than 1.0 μ

s, or

an emitting light flux higher than 10 cd/mm{circumflex over ( 

)}2.

34. The integrated device of claim 31, comprising at least one of:

a thickness less than 1.0 mm, or

a device area larger than 100 mm×

100 mm.

35. The integrated device of claim 31, wherein the device is flexible, rollable, and foldable.

36. The integrated device of claim 1, wherein the backplane is operable to drive the active-matrix light emitting pixels by pulse-width-modulation (PWM).