DATA STORAGE DEVICE, OPERATION METHOD FOR PREVENTING READ DISTURBANCE THEREOF, AND STORAGE SYSTEM USING THE SAME

• US 20190324688A1
• Filed: 10/09/2018
• Published: 10/24/2019
• Est. Priority Date: 04/19/2018
• Status: Active Grant

• Current Assignee: SK Hynix Inc.
• Original Assignee: SK Hynix Inc.
• Inventors: KANG, Min Gu
• Granted Patent: US 10,671,321 B2
• Time in Patent Office: Days
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/10 Address translation
• CPC Class Codes: G06F 2212/1032 Reliability improvement, data loss prevention, degraded operation etc
• CPC Class Codes: G06F 2212/657 Virtual address space management
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages
• CPC Class Codes: G06F 2212/7203 Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks
• CPC Class Codes: G06F 2212/7204 Capacity control, e.g. partitioning, end-of-life degradation
• CPC Class Codes: G06F 3/0619 in relation to data integrity, e.g. data losses, bit errors
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0656 Data buffering arrangements
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0673 Single storage device
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
• CPC Class Codes: G11C 16/10 Programming or data input circuits
• CPC Class Codes: G11C 16/26 Sensing or reading circuits; Data output circuits
• CPC Class Codes: G11C 16/3418 Disturbance prevention or evaluation; Refreshing of disturbed memory data
• CPC Class Codes: G11C 16/3427 Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written
• CPC Class Codes: G11C 2029/0411 Online error correction
• CPC Class Codes: G11C 29/52 Protection of memory contents; Detection of errors in memory contents
• CPC Class Codes: G11C 8/12 Group selection circuits, e.g. for memory block selection, chip selection, array selection
• CPC Class Codes: Y02D 10/00 : Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A data storage device includes a storage unit configured to include a storage area divided into a plurality of blocks, a buffer memory unit configured to temporarily store data inputted/outputted from/to the storage unit, and a controller configured to write data in the storage unit or read the data from the storage unit at a request of a host device, and to determine disturbance risk for each of the plurality of blocks based on a prescribed reference and control a block determined as a disturbance risk block not to be accessed in a read operation when the data is read from the storage unit.

Claims

1. A data storage device comprising:

a storage unit configured to include a storage area divided into a plurality of blocks;

a buffer memory unit configured to temporarily store data inputted/outputted from/to the storage unit; and

a controller configured to write data in the storage unit or read the data from the storage unit at a request of a host device, and to determine disturbance risk for each of the plurality of blocks based on a prescribed reference and control a block determined as a disturbance risk block not to be accessed in a read operation when the data is read from the storage unit.

2. The data storage device according to claim 1, wherein the prescribed reference includes at least one of information on the number of times each of the plurality of blocks is read, and information on a bit number of an error occurring in the read operation.

3. The data storage device according to claim 1, wherein the controller is configured to allow read data of the block determined as the disturbance risk block to be maintained in the buffer memory unit.

4. The data storage device according to claim 3, wherein the controller is configured to allow the read data of the disturbance risk block, which is maintained in the buffer memory unit, to be stored in an empty space of the storage unit when the data storage device is transitioned to an idle state.

5. The data storage device according to claim 1, wherein the controller comprises:

an address conversion section configured to provide a physical block address of the storage unit corresponding to a logical block address or a physical address of the buffer memory unit as access information based on a read request and the logical block address from the host device;

a read section configured to store the read data of the storage unit in the buffer memory unit when the access information is the physical block address of the storage unit; and

a read buffer management section configured to provide the read data of the buffer memory unit to the host device and maintain the read data of the buffer memory unit in the buffer memory unit when the access information is the physical address of the buffer memory unit, and configured to provide the read data of the storage unit from the buffer memory unit to the host device and delete the read data of the storage unit from the buffer memory unit when the access information is the physical block address of the storage unit.

6. A method for preventing read disturbance of a data storage device including a storage unit having a storage area divided into a plurality of blocks, a buffer memory unit that temporarily stores data inputted/outputted from/to the storage unit, and a controller that controls data exchange for the storage unit, the method comprising:

generating access information corresponding to a logical block address in response to a read command and the logical block address from a host device;

storing read data of the storage unit in the buffer memory unit when the access information indicates the storage unit;

determining disturbance risk of the storage unit indicated by the access information; and

controlling the buffer memory unit, in which the read data is stored, according to a determination result of the disturbance risk.

7. The method for preventing read disturbance of a data storage device according to claim 6, wherein the generating of the access information comprises:

detecting a physical block address of the storage unit corresponding to the logical block address or a physical address of the buffer memory unit.

8. The method for preventing read disturbance of a data storage device according to claim 6, further comprising:

transmitting the read data of the buffer memory unit to the host device when the access information indicates the buffer memory unit.

9. The method for preventing read disturbance of a data storage device according to claim 6, wherein the determining of the disturbance risk further comprises:

determining the disturbance risk based on at least one of information on the number of times the storage unit is read indicated by the access information and information on an error bit number for the read data of the storage unit indicated by the access information.

10. The method for preventing read disturbance of a data storage device according to claim 6, wherein the controlling of the buffer memory unit further comprises:

transmitting the read data of the buffer memory unit to the host device when a disturbance risk block is determined; and

maintaining the read data in the buffer memory unit.

11. The method for preventing read disturbance of a data storage device according to claim 10, further comprising:

storing the read data maintained in the buffer memory unit in an empty space of the storage unit when a state of the data storage device is transitioned to a state set in advance; and

deleting the read data from the buffer memory unit.

12. The method for preventing read disturbance of a data storage device according to claim 6, wherein the controlling of the buffer memory unit further comprises:

transmitting the read data of the buffer memory unit to the host device when a disturbance risk block is not determined; and

deleting the read data from the buffer memory unit.

13. A storage system comprising:

a host device; and

a data storage device including a storage unit having a storage area divided into a plurality of blocks, a buffer memory unit that temporarily stores data inputted/outputted from/to the storage unit, and a controller that controls data exchange for the storage unit,

wherein the controller is configured to determine disturbance risk for each of the plurality of blocks based on a prescribed reference and to prevent a block determined as a disturbance risk block from being accessed in a read operation when data is read from the storage unit at a request of the host device.

14. The storage system according to claim 13, wherein the prescribed reference includes at least one of information on the number of times each of the plurality of blocks is read and information on a bit number of an error occurring in the read operation.

15. The storage system according to claim 13, wherein the controller is configured to allow read data of the block determined as the disturbance risk block to be maintained in the buffer memory unit.

16. The storage system according to claim 15, wherein the controller is configured to allow the read data of the disturbance risk block, which is maintained in the buffer memory unit, to be stored in an empty space of the storage unit when the data storage device is transitioned to an idle state.

17. The storage system according to claim 13, wherein the controller comprises:

is an address conversion section configured to provide a physical block address of the storage unit corresponding to a logical block address or a physical address of the buffer memory unit as access information based on a read request and the logical block address from the host device;

a read section configured to store the read data of the storage unit in the buffer memory unit when the access information is the physical block address of the storage unit; and

a read buffer management section configured to provide the read data of the buffer memory unit to the host device and maintain the read data of the buffer memory unit in the buffer memory unit when the access information is the physical address of the buffer memory unit, and configured to provide the read data of the storage unit from the buffer memory unit to the host device and delete the read data of the storage unit from the buffer memory unit when the access information is the physical block address of the storage unit.

18. A memory system comprising:

a memory device including a plurality of blocks;

a buffer suitable for buffering data read from the blocks; and

a controller suitable for;

controlling the memory device to perform an operation of reading data from one or more among the blocks in response to a read request;

updating a disturbance risk information for the respective blocks based on the read operation;

detecting a disturbance risk block among the blocks based on the disturbance risk information; and

providing the buffered data of the disturbance risk block without reading data from the disturbance risk block in response to a subsequent read request.

19. The memory system according to claim 18, wherein the disturbance risk information includes one or more of a cumulative number of read operations and a number of read-error bits.