METHOD FOR PROGRAMMING A MEMORY CIRCUIT WITH A VERIFICATION PROCESS
First Claim
Patent Images
1. A memory circuit comprising:
- a first memory cell coupled to a first local bit line, and comprising an antifuse transistor configured to receive a program voltage during a program operation of the first memory cell;
a first program driver coupled to the first local bit line, and configured to drive the first local bit line to be at a low voltage when being enabled during the program operation of the first memory cell;
a second program driver coupled to the first local bit line, and configured to drive the first local bit line to be close to the low voltage when being enabled during the program operation of the first memory cell, wherein the second program driver has a weaker driving ability than the first program driver;
a sensing amplifier coupled to the first local bit line, and configured to verify whether the first memory cell has been programmed or not by comparing a verification reference voltage and a bit line voltage on the first local bit line caused by a current generated by the first memory cell when being enabled during the program operation of the first memory cell; and
a program control circuit coupled to the first program driver, the second program driver, and the sensing amplifier driver, and configured to;
enable the first program driver and the second program driver during the program operation;
disable the first program driver after the first program driver is enabled for a predetermined time; and
enable the sensing amplifier after the first program driver is disabled during the program operation.
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Abstract
A memory circuit includes a memory cell, a first program driver, a second program driver, and a sensing amplifier. A method for operating the memory circuit includes, during a program operation of the memory cell, providing a program voltage to the memory cell, enabling the first program driver to drive the first local bit line to be at a low voltage, enabling the second program driver, disabling the first program driver, and enabling the sensing amplifier to verify whether the first memory cell has been programmed or not. The second program driver has a weaker driving ability than the first program driver.
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Citations
18 Claims
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1. A memory circuit comprising:
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a first memory cell coupled to a first local bit line, and comprising an antifuse transistor configured to receive a program voltage during a program operation of the first memory cell; a first program driver coupled to the first local bit line, and configured to drive the first local bit line to be at a low voltage when being enabled during the program operation of the first memory cell; a second program driver coupled to the first local bit line, and configured to drive the first local bit line to be close to the low voltage when being enabled during the program operation of the first memory cell, wherein the second program driver has a weaker driving ability than the first program driver; a sensing amplifier coupled to the first local bit line, and configured to verify whether the first memory cell has been programmed or not by comparing a verification reference voltage and a bit line voltage on the first local bit line caused by a current generated by the first memory cell when being enabled during the program operation of the first memory cell; and a program control circuit coupled to the first program driver, the second program driver, and the sensing amplifier driver, and configured to; enable the first program driver and the second program driver during the program operation; disable the first program driver after the first program driver is enabled for a predetermined time; and enable the sensing amplifier after the first program driver is disabled during the program operation. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A method for operating a memory circuit, the memory circuit comprising a memory cell, a first program driver, a second program driver, and a sensing amplifier, the method comprising:
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during a program operation of the memory cell; providing a program voltage to the memory cell; enabling the first program driver to drive the first local bit line to be at a low voltage; enabling the second program driver; disabling the first program driver; and enabling the sensing amplifier to verify whether the first memory cell has been programmed or not; wherein the second program driver has a weaker driving ability than the first program driver. - View Dependent Claims (14, 15, 16, 17, 18)
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Specification