MECHANICAL COUPLINGS DESIGNED TO RESOLVE PROCESS CONSTRAINTS

• US 20190326131A1
• Filed: 07/01/2019
• Published: 10/24/2019
• Est. Priority Date: 12/29/2017
• Status: Abandoned Application

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: CHIEN, Yuh-Harng, CHOU, Hung-Yu, LEE, Fu-Kang, KUMMERL, Steven Alfred
• Application Number:
  US16/459,184
• Publication Number:
  US 20190326131A1
• Time in Patent Office: Days
• CPC Class Codes: H01L 21/4825 Connection or disconnection of other leads to or from flat leads, e.g. wires, bumps, other flat leads
• CPC Class Codes: H01L 21/4842 Mechanical treatment, e.g. punching, cutting, deforming, cold welding
• CPC Class Codes: H01L 23/49517 Additional leads
• CPC Class Codes: H01L 23/49548 Cross section geometry H01L23/49562 takes precedence
• CPC Class Codes: H01L 23/49551 characterised by bent parts
• CPC Class Codes: H01L 23/49562 for devices being provided for in H01L29/00
• CPC Class Codes: H01L 23/62 Protection against overvoltage, e.g. fuses, shunts
• CPC Class Codes: H01L 24/00 Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
• CPC Class Codes: H01L 2924/19043 being a resistor
• CPC Class Codes: H01L 2924/19105 in a side-by-side arrangement on a common die mounting substrate

Abstract

An integrated circuit package having a shunt resistor with at least one self-aligning member that protrudes from a first surface, and a lead frame with at least one self-aligning feature that is a cavity within which the at least one self-aligning member is located, and an integrated circuit located on the lead frame.

Claims

1. An integrated circuit package, comprising:

a pad including a cavity;

at least one lead extending from the pad;

a resistor including a member that extends from a first surface of the resistor, the member within the cavity such that the resistor is electrically connected to the pad;

an integrated circuit die electrically connected to the resistor.

2. The integrated circuit package of claim 1, wherein resistor is a shunt resistor.

3. The integrated circuit package of claim 1 further comprising a conductive paste between the member and the cavity.

4. The integrated circuit package of claim 1, wherein the cavity extends from a first side of the pad to a second side of the pad.

6. The integrated circuit package of claim 1, wherein the pad is located below a plane along a surface of the at least one lead.

5. The integrated circuit package of claim 5, wherein the member protrudes beyond a plane along a surface of the second side of the pad.

7. An integrated circuit package, comprising:

a shunt resistor having at least one member that protrudes from a first surface of the shunt resistor; and

a portion of a lead frame having at least one a cavity extending from a first surface of the portion of the lead frame facing the first surface of the shunt resistor, the at least one member located within the at least one cavity; and

an integrated circuit located on the portion of the lead frame.

8. The integrated circuit package of claim 7, wherein the cavity is a through hole that extends from the first side of the portion of the lead frame through a second side of the portion of the lead frame, that is opposite the first side of the portion of the lead frame.

9. The integrated circuit package of claim 8, wherein an outermost surface of the at least one self-aligning member has a surface area that is greater than a surface area of the self-aligning feature of the portion of the lead frame.

10. The integrated circuit package of claim 7, wherein the integrated circuit package is a quad flat no-lead (QFN) package.

11. The integrated circuit package of claim 7, wherein the shunt resistor has at least four members.

12. The integrated circuit package of claim 7, wherein the at least one member protrudes beyond a plane of the portion of the lead frame.

13. The integrated circuit package of claim 7, wherein the at least one member includes a feature resultant of stamping at one end.

14. An amplifier comprising:

an integrated circuit package comprising;

a shunt resistor having at least two self-aligning members, each of the at least two self-aligning members being formed from a material of the shunt resistor and as protrusions from a first surface of the shunt resistor; and

a pad of a portion of a lead frame having at least two holes extending from a first surface of the pad facing the first surface of the shunt resistor through a second surface of the pad opposite the first surface, wherein each of the at least two self-aligning members are located within and through a respective one of the at least two holes; and

an integrated circuit located on said lead frame.

15. The integrated circuit package of claim 14, wherein the at least two self-aligning members protrude beyond a plane of the portion of the pad.

16. The integrated circuit package of claim 14, wherein the at least two self-aligning members include a feature resultant of stamping at one end.