SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME

• US 20190326193A1
• Filed: 01/13/2017
• Published: 10/24/2019
• Est. Priority Date: 01/13/2017
• Status: Active Grant

• Current Assignee: Mitsubishi Electric Corporation
• Original Assignee: Mitsubishi Electric Corporation
• Inventors: NAKATA, Yosuke, AKAO, Shinya, HARADA, Kenji
• Granted Patent: US 10,896,863 B2
• Time in Patent Office: Days
• CPC Class Codes: H01L 21/0217 the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz H01L21/02126 and H01L21/0214 take precedence
• CPC Class Codes: H01L 21/0272 for lift-off processes
• CPC Class Codes: H01L 21/288 from a liquid, e.g. electrolytic deposition
• CPC Class Codes: H01L 21/31111 by chemical means
• CPC Class Codes: H01L 21/32139 using masks
• CPC Class Codes: H01L 2224/0346 Plating
• CPC Class Codes: H01L 2224/04026 Bonding areas specifically adapted for layer connectors
• CPC Class Codes: H01L 2224/05552 in top view
• CPC Class Codes: H01L 2224/05568 the whole external layer protruding from the surface
• CPC Class Codes: H01L 2224/05644 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/05647 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/05655 Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/0603 Bonding areas having different sizes, e.g. different heights or widths
• CPC Class Codes: H01L 2224/06181 On opposite sides of the body
• CPC Class Codes: H01L 2224/26145 Flow barriers
• CPC Class Codes: H01L 2224/29013 being rectangular or square
• CPC Class Codes: H01L 2224/291 with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 2224/29111 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/29139 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/29155 Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/29339 : Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/32225 : the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32245 : the item being metallic
• CPC Class Codes: H01L 2224/33107 : the layer connectors connecting two common bonding areas
• CPC Class Codes: H01L 2224/3315 : Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry
• CPC Class Codes: H01L 2224/33181 : On opposite sides of the body
• CPC Class Codes: H01L 2224/8384 : Sintering
• CPC Class Codes: H01L 23/3121 : a substrate forming part of the encapsulation
• CPC Class Codes: H01L 23/3675 : characterised by the shape of the housing
• CPC Class Codes: H01L 23/4334 : Auxiliary members in encapsulations H01L23/49568 takes precedence
• CPC Class Codes: H01L 23/482 : consisting of lead-in layers inseparably applied to the semiconductor body electrodes H01L29/40
• CPC Class Codes: H01L 23/49513 : having bonding material between chip and die pad
• CPC Class Codes: H01L 23/49541 : Geometry of the lead-frame
• CPC Class Codes: H01L 23/49562 : for devices being provided for in H01L29/00
• CPC Class Codes: H01L 24/03 : Manufacturing methods
• CPC Class Codes: H01L 24/05 : of an individual bonding area
• CPC Class Codes: H01L 24/06 : of a plurality of bonding areas
• CPC Class Codes: H01L 24/29 : of an individual layer connector
• CPC Class Codes: H01L 24/32 : of an individual layer connector
• CPC Class Codes: H01L 24/33 : of a plurality of layer connectors
• CPC Class Codes: H01L 24/83 : using a layer connector
• CPC Class Codes: H01L 29/0619 : with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
• CPC Class Codes: H01L 29/401 : Multistep manufacturing processes
• CPC Class Codes: H01L 29/41741 : for vertical or pseudo-vertical devices
• CPC Class Codes: H01L 29/4238 : characterised by the surface lay-out
• CPC Class Codes: H01L 29/45 : Ohmic electrodes
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/05042 : Si3N4
• CPC Class Codes: H01L 2924/07025 : Polyimide
• CPC Class Codes: H01L 2924/10254 : Diamond [C]
• CPC Class Codes: H01L 2924/10272 : Silicon Carbide [SiC]
• CPC Class Codes: H01L 2924/1033 : Gallium nitride [GaN]
• CPC Class Codes: H01L 2924/13055 : Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/302 : Electrostatic
• CPC Class Codes: H01L 2924/3511 : Warping

Abstract

A semiconductor substrate (1) has a front surface and a rear surface facing each other. A gate wiring (2) and first and second front surface electrodes (3,4) are provided on the front surface of the semiconductor substrate (1). The first and second front surface electrodes (3,4) are separated from each other by the gate wiring (2). An insulating film (7) covers the gate wiring (2). An electrode layer (8) is provided on the insulating film (7) and the first and second front surface electrodes (3,4) across the gate wiring (2). A rear surface electrode (9) is provided on the rear surface of the semiconductor substrate (1). A first plated electrode (10) is provided on the electrode layer (8). A second plated electrode (11) is provided on the rear surface electrode (9).

Claims

1. A semiconductor device comprising:

a semiconductor substrate having a front surface and a rear surface facing each other;

a gate wiring provided on the front surface of the semiconductor substrate;

first and second front surface electrodes provided on the front surface of the semiconductor substrate and separated from each other by the gate wiring;

an insulating film covering the gate wiring;

an electrode layer provided on the insulating film and the first and second front surface electrodes across the gate wiring;

a rear surface electrode provided on the rear surface of the semiconductor substrate;

a first plated electrode provided on the electrode layer; and

a second plated electrode provided on the rear surface electrode.

2. The semiconductor device according to claim 1, wherein thicknesses and materials of the first and second plated electrodes are the same.

3. The semiconductor device according to claim 1, wherein thicknesses of the first and second plated electrodes are 1 μ

m or more and 10 μ

m or less.

4. The semiconductor device according to claim 1, wherein the insulating film is provided between the first and second front surface electrodes and the electrode layer,

a plurality of through holes are provided in the insulating film, and

the first and second front surface electrodes are mechanically and electrically connected to the electrode layer through the plurality of through holes.

5. The semiconductor device according to claim 1, wherein the insulating film is a protective film that protects a terminal region and extends to an operating cell region.

6. The semiconductor device according to claim 1, comprising a terminal structure wiring provided on the front surface of the semiconductor substrate in a terminal region and having the same thickness as the first and second front surface electrodes,

wherein the electrode layer is not provided in the terminal region.

7. The semiconductor device according to claim 6, wherein thicknesses of the first and second front surface electrodes and the terminal structure wiring are less than a thickness of the electrode layer.

8. The semiconductor device according to claim 1, further comprising:

a lead frame joined to the first plated electrode by a first joining material;

a conductor substrate joined to the second plated electrode by a second joining material; and

a sealing material covering at least a part of the semiconductor substrate, the lead frame, the conductor substrate.

9. The semiconductor device according to claim 8, wherein the first joining material is provided in a region other than the gate wiring.

10. The semiconductor device according to claim 8, wherein the first and second joining materials include tin.

11. The semiconductor device according to claim 1, comprising a coating film covering an outer periphery of a solder joining region of the first plated electrode.

12. The semiconductor device according to claim 11, wherein the coating film includes a polyimide.

13. The semiconductor device according to claim 1, further comprising an organic film provided on the insulating film.

14. The semiconductor device according to claim 13, wherein the organic film includes a polyimide.

15. The semiconductor device according to claim 1, wherein the first and second front surface electrodes and the rear surface electrode are made of a material including aluminum.

16. The semiconductor device according to claim 1, wherein the electrode layer is made of a material including aluminum.

17. The semiconductor device according to claim 1, wherein the insulating film includes silicon nitride.

18. The semiconductor device according to claim 1, wherein the first and second plated electrodes include nickel or copper.

19. The semiconductor device according to claim 1, wherein a material including gold is provided on outermost surfaces of the first and second plated electrodes.

20. The semiconductor device according to claim 1, wherein the semiconductor substrate is made of a wide-band-gap semiconductor.

21-25. -25. (canceled)