THREE-DIMENSIONAL MEMORY DEVICE AND METHODS OF MAKING THE SAME USING REPLACEMENT DRAIN SELECT GATE ELECTRODES
First Claim
1. A three-dimensional memory device, comprising:
- an alternating stack of insulating layers and electrically conductive layers located over a substrate;
drain-select-level electrically conductive strips located over the alternating stack;
a drain-select-level isolation structure located between a neighboring pair of the drain-select-level electrically conductive strips;
memory stack structures comprising a respective memory film and a respective vertical semiconductor channel vertically extending through the alternating stack and a respective one of the drain-select-level electrically conductive strips, wherein the memory stack structures contact, and are completely laterally surrounded by, a cylindrical sidewall of a respective one of the drain-select-level electrically conductive strips; and
a contact level dielectric layer overlying the drain-select-level electrically conductive strips, the drain-select-level isolation structure and the memory stack structures, wherein the contact level dielectric layer contacts the drain-select-level isolation structure.
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Accused Products
Abstract
A method of forming a three-dimensional memory device includes forming an alternating stack of insulating layers and sacrificial material layers over a substrate, forming a patterned template structure around memory openings in a drain-select-level above the alternating stack, forming drain-select-level isolation structures in trenches in the patterned template structure, forming memory stack structures in the memory openings extending through the alternating stack, where each of the memory stack structures includes a memory film and a vertical semiconductor channel, replacing the sacrificial material layers with word lines, and separately replacing the patterned template structure with a drain select gate electrode.
6 Citations
26 Claims
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1. A three-dimensional memory device, comprising:
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an alternating stack of insulating layers and electrically conductive layers located over a substrate; drain-select-level electrically conductive strips located over the alternating stack; a drain-select-level isolation structure located between a neighboring pair of the drain-select-level electrically conductive strips; memory stack structures comprising a respective memory film and a respective vertical semiconductor channel vertically extending through the alternating stack and a respective one of the drain-select-level electrically conductive strips, wherein the memory stack structures contact, and are completely laterally surrounded by, a cylindrical sidewall of a respective one of the drain-select-level electrically conductive strips; and a contact level dielectric layer overlying the drain-select-level electrically conductive strips, the drain-select-level isolation structure and the memory stack structures, wherein the contact level dielectric layer contacts the drain-select-level isolation structure. - View Dependent Claims (2, 3, 4, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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5. The three-dimensional memory device of Clam 1, wherein:
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each of the drain-select-level electrically conductive strips has a top surface located below a horizontal plane including a top surface of the drain-select-level isolation structure; and each of the drain-select-level electrically conductive strips has a bottom surface located within a horizontal plane including a bottom surface of the drain-select-level isolation structure.
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16. A method of forming a three-dimensional memory device, comprising:
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forming an alternating stack of insulating layers and spacer material layers over a substrate, wherein the spacer material layers are formed as, or are subsequently replaced with, electrically conductive layers; forming a sacrificial matrix layer over the alternating stack; forming sacrificial pillar structures through the sacrificial matrix layer and the alternating stack; replacing at least the sacrificial matrix layer with a combination of a patterned template structure and an insulating cap layer, wherein the patterned template structure comprises template material blocks that laterally surround an upper region of a respective subset of the sacrificial pillar structures and have a respective sidewall including a plurality of convex vertical sidewall segments; replacing the sacrificial pillar structures with memory opening fill structures comprising a memory film and a vertical semiconductor channel; forming drain-select-level cavities by removing an entirety of each of the template material blocks; and depositing at least one electrically conductive material within volumes of the drain-select-level cavities to form drain-select-level electrically conductive strips. - View Dependent Claims (17, 18, 19, 20, 21, 22, 23, 24, 25)
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26. A method of forming a three-dimensional memory device, comprising:
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forming an alternating stack of insulating layers and sacrificial material layers over a substrate; forming a patterned template structure around memory openings in a drain-select-level above the alternating stack; forming drain-select-level isolation structures in trenches in the patterned template structure; forming memory stack structures in the memory openings extending through the alternating stack, wherein each of the memory stack structures comprises a memory film and a vertical semiconductor channel; replacing the sacrificial material layers with word lines; and separately replacing the patterned template structure with a drain select gate electrode.
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Specification