METHODS OF FORMING BACKSIDE SELF-ALIGNED VIAS AND STRUCTURES FORMED THEREBY
First Claim
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1. A microelectronic device structure, comprising:
- a fin of semiconductor material, the fin comprising a channel region, and a base below the channel region;
a dielectric material adjacent to a sidewall of the base;
a gate electrode adjacent to a sidewall of the channel region and over the dielectric material;
a drain region adjacent to a first end of the channel region;
a first contact to a first side of the drain region, the first contact adjacent to the gate electrode;
a source region adjacent to a second end of the channel region, opposite the first end;
a second contact to a first side of the source region, the second contact adjacent to the gate electrode; and
a third contact adjacent to an end of the base, and in contact with a second side of the source region or the drain region, opposite the first side of the source region or drain region.
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Abstract
Methods and structures formed thereby are described, of forming self-aligned contact structures for microelectronic devices. An embodiment includes forming a trench in a source/drain region of a transistor device disposed in a device layer, wherein the device layer is on a substrate, forming a fill material in the trench, forming a source/drain material on the fill material, forming a first source/drain contact on a first side of the source/drain material, and then forming a second source drain contact on a second side of the source/drain material.
1 Citation
20 Claims
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1. A microelectronic device structure, comprising:
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a fin of semiconductor material, the fin comprising a channel region, and a base below the channel region; a dielectric material adjacent to a sidewall of the base; a gate electrode adjacent to a sidewall of the channel region and over the dielectric material; a drain region adjacent to a first end of the channel region; a first contact to a first side of the drain region, the first contact adjacent to the gate electrode; a source region adjacent to a second end of the channel region, opposite the first end; a second contact to a first side of the source region, the second contact adjacent to the gate electrode; and a third contact adjacent to an end of the base, and in contact with a second side of the source region or the drain region, opposite the first side of the source region or drain region. - View Dependent Claims (2, 3, 4, 5, 6, 7, 15)
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8. A microelectronic device structure, comprising:
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a first transistor, comprising; a first fin of semiconductor material, the first fin comprising a first channel region, and a first base below the first channel region; a dielectric material adjacent to a sidewall of the first base; a first gate electrode adjacent to a sidewall of the first channel region and over the dielectric material; a first source/drain region adjacent to a first end of the first channel region; a first contact to a first side of the first source/drain region, the first contact adjacent to the first gate electrode; a second source/drain region adjacent to a second end of the first channel region, opposite the first end of the first channel region; a second contact to a first side of the second source/drain region, the second contact adjacent to the first gate electrode; and a third contact adjacent to an end of the first base, and in contact with the second side of the first source/drain region, opposite the first side of the first source/drain region; and a second transistor, comprising; a second fin of the semiconductor material, the second fin comprising a second channel region, and a second base below the second channel region, wherein a sidewall of the second base is separated from the sidewall of the first base by the dielectric material; a second gate electrode adjacent to a sidewall of the second channel region and over the dielectric material; a third source/drain region adjacent to a first end of the second channel region; a fourth contact to a first side of the third source/drain region, the fourth contact adjacent to the second gate electrode; a fourth source/drain region adjacent to a second end of the second channel region, opposite the first end of the second channel region; a fifth contact to a first side of the fourth source/drain region, the fifth contact adjacent to the second gate electrode; and a sixth contact adjacent to an end of the second base, and in contact with a second side of the fourth source/drain region, opposite the first side of the fourth source/drain region, wherein a sidewall of the third contact is separated from a sidewall of the sixth contact by the dielectric material. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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16. A method of forming a microelectronic structure, the method comprising:
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forming a gate electrode over a sidewall of a channel region of a device layer comprising a semiconductor material; forming trench in the device layer to a depth below the channel region; forming a first contact within the trench; forming a source/drain region in contact with the channel region and over the first contact; forming a second contact to a side of the source/drain region opposite the first contact. - View Dependent Claims (17, 18, 19, 20)
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Specification