RESISTIVE MEMORY DEVICE HAVING A TEMPLATE LAYER
First Claim
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1. A memory device, comprising:
- a template layer; and
a memory layer connected to the template layer, wherein the memory layer has a variable resistance which can vary between first and second resistance values, and wherein the first resistance value is equal to or greater than two times the second resistance value.
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Abstract
A memory device including a template layer is disclosed. The memory device also includes a memory layer connected to the template layer, where the memory layer has a variable resistance, and where the crystalline structure of the memory layer matches the crystalline structure of the template layer. The memory device also includes a conductive top electrode on the memory layer, where the top electrode and the memory layer cooperatively form a heterojunction memory structure.
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Citations
22 Claims
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1. A memory device, comprising:
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a template layer; and a memory layer connected to the template layer, wherein the memory layer has a variable resistance which can vary between first and second resistance values, and wherein the first resistance value is equal to or greater than two times the second resistance value. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A method of manufacturing a memory device, the method comprising:
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forming a template layer; and connecting a memory layer to the template layer, wherein the memory layer has a variable resistance which can vary between first and second resistance values, and wherein the first resistance value is equal to or greater than two times the second resistance value. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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17. A method of using a memory device, the memory device comprising a template layer, a memory layer connected to the template layer, wherein the memory layer has a variable resistance, the method comprising:
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applying a first voltage difference across the template layer and the memory layer, whereby an electric field is generated in the memory layer, and such that a resistance of the memory layer is changed from a first resistance value to a second resistance value, and wherein the first resistance value is equal to or greater than two times the second resistance value; applying a second voltage difference across the template layer and the memory layer; while the second voltage difference is applied, causing a first current to be conducted through the template layer and the memory layer; and determining a resistivity state of the memory layer based on the second voltage and the first current. - View Dependent Claims (18, 19, 20, 21, 22)
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Specification