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SEMICONDUCTOR MEMORY DEVICE

  • US 20190333549A1
  • Filed: 03/29/2019
  • Published: 10/31/2019
  • Est. Priority Date: 04/25/2018
  • Status: Active Grant
First Claim
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1. A semiconductor memory device, comprising:

  • a memory cell array;

    a plurality of charge pump circuits; and

    a controller controlling a timing of activating the charge pump circuits when a selected page of the memory cell array is read so that the charge pump circuits are not activated at the same timing.

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