SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME
First Claim
1. A semiconductor memory device comprising:
- a plurality of memory cells configured to be programmed to have different threshold voltage distributions;
peripheral circuits configured to perform a program operation on selected memory cells among the plurality of memory cells by applying a main program voltage to a word line coupled to the plurality of memory cells, perform a verify operation on the selected memory cells by applying a verify voltage to the word line, and perform a compensation program operation on the selected memory cells by applying a compensation program voltage to the word line; and
a control logic configured to control the peripheral circuits such that the compensation program operation is performed by applying the compensation program voltage to the selected memory cells to be programmed to a selected threshold voltage distribution among the threshold voltage distributions other than a highest threshold voltage distribution,wherein the compensation program voltage has a positive voltage lower than the main program voltage most recently applied to the word line.
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Accused Products
Abstract
Provided herein may be a semiconductor memory device and a method of operating the same. The semiconductor memory device may include peripheral circuits configured to perform a verify operation on selected memory cells by applying a verify voltage to a word line, and perform a compensation program operation on the selected memory cells by applying a compensation program voltage to the word line; and a control logic configured to control the peripheral circuits such that the compensation program operation is performed by applying the compensation program voltage to the selected memory cells to be programmed to a selected threshold voltage distribution among the threshold voltage distributions other than a highest threshold voltage distribution, wherein the compensation program voltage has a positive voltage lower than the main program voltage most recently applied to the word line.
3 Citations
10 Claims
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1. A semiconductor memory device comprising:
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a plurality of memory cells configured to be programmed to have different threshold voltage distributions; peripheral circuits configured to perform a program operation on selected memory cells among the plurality of memory cells by applying a main program voltage to a word line coupled to the plurality of memory cells, perform a verify operation on the selected memory cells by applying a verify voltage to the word line, and perform a compensation program operation on the selected memory cells by applying a compensation program voltage to the word line; and a control logic configured to control the peripheral circuits such that the compensation program operation is performed by applying the compensation program voltage to the selected memory cells to be programmed to a selected threshold voltage distribution among the threshold voltage distributions other than a highest threshold voltage distribution, wherein the compensation program voltage has a positive voltage lower than the main program voltage most recently applied to the word line. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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Specification