Method And System For Split Voltage Domain Transmitter Circuits
First Claim
1. An electro-optical modulator interface comprising:
- one or more circuits in an integrated circuit, said one or more circuits operable to;
generate a pair of signals using a differential amplifier and a domain splitter, said domain splitter comprising a pair of stacked transistors with gates coupled to the differential amplifier;
communicate the pair of signals to stacked inverters; and
amplify the signals using said stacked inverters, each operating in a different partial voltage domain, wherein each of said partial voltage domains is offset by a DC voltage from other said partial voltage domains and wherein a sum of said plurality of partial domains is equal to a supply voltage of said integrated circuit.
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Accused Products
Abstract
Methods and systems for split voltage domain transmitter circuits may include a two-branch output stage including a plurality of CMOS transistors, with each branch of the two-branch output stage comprising two stacked CMOS inverter pairs. The two stacked CMOS inverter pairs of a given branch are configured to drive a respective load, in phase opposition to the other branch. A pre-driver circuit is configured to receive a differential modulating signal and output, to respective inputs of the two stacked CMOS inverters, two synchronous differential voltage drive signals having a swing of half the supply voltage and being DC-shifted by half of the supply voltage with respect to each other. The load may include a series of diodes that are driven in differential mode via the drive signals. An optical signal may be modulated via the diodes.
10 Citations
20 Claims
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1. An electro-optical modulator interface comprising:
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one or more circuits in an integrated circuit, said one or more circuits operable to; generate a pair of signals using a differential amplifier and a domain splitter, said domain splitter comprising a pair of stacked transistors with gates coupled to the differential amplifier; communicate the pair of signals to stacked inverters; and amplify the signals using said stacked inverters, each operating in a different partial voltage domain, wherein each of said partial voltage domains is offset by a DC voltage from other said partial voltage domains and wherein a sum of said plurality of partial domains is equal to a supply voltage of said integrated circuit. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method for processing signals, the method comprising:
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in an integrated circuit; generating a pair of signals using a differential amplifier and a domain splitter, said domain splitter comprising a pair of stacked transistors with gates coupled to the differential amplifier; communicating the pair of signals to stacked inverters; and amplifying the signals using said stacked inverters, each operating in a different partial voltage domain, wherein each of said partial voltage domains is offset by a DC voltage from other of said partial voltage domains and wherein a sum of said plurality of partial domains is equal to a supply voltage of said integrated circuit. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18)
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19. A system for processing signals, the system comprising:
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one or more circuits in an integrated circuit, said one or more circuits operable to; generate a pair of signals using a differential amplifier and a domain splitter, said domain splitter comprising a pair of stacked transistors with gates coupled to the differential amplifier; communicate the pair of signals to stacked CMOS inverters; and amplify the signals using said stacked CMOS inverters, each operating in a different partial voltage domain, wherein each of said partial voltage domains is offset by a DC voltage from other said partial voltage domains and wherein a sum of said plurality of partial domains is equal to a supply voltage of said integrated circuit. - View Dependent Claims (20)
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Specification