Three-Dimensional Memory Device Including Bottle-Shaped Memory Stack Structures and Drain-Select Gate Electrodes having Cylindrical Portions
First Claim
1. A three-dimensional memory device, comprising:
- an alternating stack of insulating layers and electrically conductive layers located over a substrate;
drain-select-level gate electrodes located over the alternating stack;
memory openings extending through the alternating stack and a respective one of the drain-select-level gate electrodes; and
memory opening fill structures located in the memory openings,wherein each of the memory opening fill structures comprises a respective semiconductor channel;
wherein each semiconductor channel comprises;
a respective first vertically-extending portion extending through levels of the electrically conductive layers and having a first maximum lateral channel dimension, anda respective second vertically-extending portion located at a level of the drain-select-level gate electrodes and having a second maximum lateral channel dimension that is less than the first maximum lateral channel dimension; and
wherein each of the drain-select-level gate electrodes comprises;
a planar portion having two sets of vertical sidewall segments; and
a set of cylindrical portions vertically protruding upward from the planar portion and laterally surrounding a respective one of the memory opening fill structures.
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Abstract
A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, drain-select-level gate electrodes located over the alternating stack, memory openings extending through the alternating stack and a respective one of the drain-select-level gate electrodes, and memory opening fill structures located in the memory openings. The memory opening fill structures can have a stepped profile to provide a smaller lateral dimension at the level of the drain-select-level gate electrodes than within the alternating stack. Each of the drain-select-level gate electrodes includes a planar portion having two sets of vertical sidewall segments, and a set of cylindrical portions vertically protruding upward from the planar portion and laterally surrounding a respective one of the memory opening fill structures. The memory opening fill structures can be formed on-pitch as a two-dimensional array.
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Citations
20 Claims
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1. A three-dimensional memory device, comprising:
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an alternating stack of insulating layers and electrically conductive layers located over a substrate; drain-select-level gate electrodes located over the alternating stack; memory openings extending through the alternating stack and a respective one of the drain-select-level gate electrodes; and memory opening fill structures located in the memory openings, wherein each of the memory opening fill structures comprises a respective semiconductor channel; wherein each semiconductor channel comprises; a respective first vertically-extending portion extending through levels of the electrically conductive layers and having a first maximum lateral channel dimension, and a respective second vertically-extending portion located at a level of the drain-select-level gate electrodes and having a second maximum lateral channel dimension that is less than the first maximum lateral channel dimension; and wherein each of the drain-select-level gate electrodes comprises; a planar portion having two sets of vertical sidewall segments; and a set of cylindrical portions vertically protruding upward from the planar portion and laterally surrounding a respective one of the memory opening fill structures. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. A method of forming a three-dimensional memory device, comprising:
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forming an alternating stack of insulating layers and spacer material layers over a substrate, wherein the spacer material layers are formed as, or are subsequently replaced with, electrically conductive layers; forming sacrificial pillar structures extending through the alternating stack and including a respective upper region that protrudes above the alternating stack and having a first maximum lateral dimension and a respective lower region embedded within the alternating stack and having a second maximum lateral dimension that is greater than the first maximum lateral dimension; replacing the sacrificial pillar structures with memory opening fill structures comprising a memory film and a semiconductor channel; forming a continuous metallic material layer over the alternating stack and the memory opening fill structures; removing horizontal portions of the continuous metallic material layer that overlie the memory opening fill structures or located within areas of a respective uniform width between a respective pair of rows of memory opening fill structures to form drain-select-level gate electrodes. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification