HIGH TEMPERATURE COATINGS FOR A PRECLEAN AND ETCH APPARATUS AND RELATED METHODS

• US 20200131634A1
• Filed: 10/26/2018
• Published: 04/30/2020
• Est. Priority Date: 10/26/2018
• Status: Active Application

• Current Assignee: ASM IP Holding B.V. (ASM International NV)
• Original Assignee: ASM IP Holding B.V. (ASM International NV)
• Inventors: Gao, Peipei, Lin, Xing, Demos, Alexandros, Wei, Chuang, Wang, Wentao, Ma, Mingyang, Nagaraj, Prajwal
• Application Number:
  US16/172,535
• Publication Number:
  US 20200131634A1
• Time in Patent Office: Days
• CPC Class Codes: C23C 16/0245 by etching with a plasma
• CPC Class Codes: C23C 16/4404 Coatings or surface treatment on the inside of the reaction chamber or on parts thereof
• CPC Class Codes: C23C 16/45536 Use of plasma, radiation or electromagnetic fields
• CPC Class Codes: C23C 16/45565 Shower nozzles
• CPC Class Codes: H01J 2237/3321 CVD [Chemical Vapor Deposition]
• CPC Class Codes: H01J 2237/3341 Reactive etching
• CPC Class Codes: H01J 37/32357 Generation remote from the workpiece, e.g. down-stream
• CPC Class Codes: H01J 37/32449 Gas control, e.g. control of the gas flow
• CPC Class Codes: H01J 37/32495 Means for protecting the vessel against plasma
• CPC Class Codes: H01L 21/67023 for general liquid treatment, e.g. etching followed by cleaning

Abstract

A coating and a method to form the coating is proposed for a semiconductor film pre-clean and etch apparatus. The coating may be employed in environments where it is difficult to use a traditional coating or coating method. The coatings provide advantages including: an ability to effectively deliver hydrogen radicals and fluorine radicals to a wafer surface in one apparatus or individually in two apparatuses; a coverage of high aspect ratio features on critical components; an operability in high temperatures exceeding 150° C.; and a protection of a part with high aspect ratio features underneath the coating, thereby preventing metal and particles on a processed wafer.

Claims

1. A semiconductor film pre-clean/etch apparatus comprising:

a reaction chamber;

a wafer holder within the reaction chamber configured to hold a semiconductor wafer;

a gas transport path configured to ensure a gas delivery to the reaction chamber and a uniform mixture of at least two gases;

a gas distribution device for dispersing a gas across the semiconductor wafer;

a gas manifold to helps deliver hydrogen radical to wafer edge; and

a remote plasma unit that converts a first gas provided by a first gas source into a radical gas;

wherein at least one of the wafer holder, the reaction chamber, the gas transport path, the gas distribution device, the gas manifold, or the remote plasma unit comprises a coating with a first layer and a second layer;

wherein at least one of the first layer or the second layer of the coating is formed by atomic layer deposition (ALD); and

wherein the first layer and the second layer comprise different materials.

2. The apparatus of claim 1, wherein the first layer is on the gas distribution device and a thickness of the first layer ranges between:

1-10,000 nm;

10-2,500 nm;

or 100-500 nm.

3. The apparatus of claim 1, wherein the second layer is on the gas distribution device and a thickness of the second layer ranges between:

1-10,000 nm;

10-2,500 nm;

or 100-500 nm.

4. The apparatus of claim 1, wherein the first layer is on the remote plasma unit and a thickness of the first layer ranges between:

1-50,000 nm;

10-25,000 nm;

or 100-10,000 nm.

5. The apparatus of claim 1, wherein the second layer is on the remote plasma unit and a thickness of the second layer ranges between:

1-50,000 nm;

10-25,000 nm;

or 100-10,000 nm.

6. The apparatus of claim 1, wherein the first layer comprises at least one of:

aluminum oxide (Al₂O₃), yttrium oxide (Y₂O₃), yttrium fluoride (YF₃), yttrium oxyfluoride (YO_xF_y), aluminum fluoride (AlF₃), scandium oxide (Sc₂O₃), hafnium oxide (HfO₂), lanthanum oxide (La₂O₃), samarium oxide (Sm₂O₃), gadolinium oxide (Gd₂O₃), erbium oxide (Er₂O₃), zirconium oxide (ZrO₂), or cerium oxide (CeO₂).

7. The apparatus of claim 1, wherein the second layer comprises at least one of:

aluminum oxide (Al₂O₃), yttrium oxide (Y₂O₃), yttrium fluoride (YF₃), yttrium oxyfluoride (YO_xF_y), aluminum fluoride (AlF₃), scandium oxide (Sc₂O₃), hafnium oxide (HfO₂), lanthanum oxide (La₂O₃), samarium oxide (Sm₂O₃), gadolinium oxide (Gd₂O₃), erbium oxide (Er₂O₃), zirconium oxide (ZrO₂), or cerium oxide (CeO₂).

8. The apparatus of claim 1, wherein both the first layer and the second layer are formed by ALD.

9. The apparatus of claim 1, wherein the first layer is formed by ALD and the second layer is formed by at least one of:

anodization, chemical vapor deposition (CVD), plasma vapor deposition (PVD), plasma spray coating, or plasma electrolytic oxidation (PEO).

10. The apparatus of claim 1, wherein the first layer and the second layer form a composite coating on at least one of:

the wafer holder, the reaction chamber, the gas transport path, the gas distribution device, the gas manifold, or the remote plasma unit.

11. The apparatus of claim 10, wherein formation of the composite coating is repeated several times on at least one of:

the wafer holder, the reaction chamber, the gas transport path, the gas distribution device, the gas manifold, or the remote plasma unit.

12. A method for forming a coating for a semiconductor film pre-clean/etch apparatus comprising:

preparing a first surface to be coated;

cleaning the first surface;

depositing a first coating layer on the first surface with an atomic layer deposition (ALD) technique;

depositing a second coating layer on the first coating layer to form a multi-layer coating;

repeating the step of forming the first coating layer and forming the second coating layer as required; and

performing a post-coating treatment on the composite coating;

wherein the first coating layer comprises a material different from that of the second coating layer;

wherein the semiconductor film deposition apparatus comprises;

a wafer holder;

a reaction chamber;

a gas transport path, a gas distribution device;

a gas manifold; and

a remote plasma unit; and

wherein the composite coating is disposed on at least one of;

the wafer holder;

the reaction chamber;

the gas transport path, the gas distribution device;

the gas manifold;

or the remote plasma unit.

13. The method of claim 12, wherein depositing the second layer is performed by at least one of:

anodization, chemical vapor deposition (CVD), plasma vapor deposition (PVD), plasma spray coating, or plasma electrolytic oxidation (PEO).

14. The method of claim 12, wherein the first coating layer comprises at least one of:

aluminum oxide (Al₂O₃), yttrium oxide (Y₂O₃), yttrium fluoride (YF₃), yttrium oxyfluoride (YO_xF_y), aluminum fluoride (AlF₃), scandium oxide (Sc₂O₃), hafnium oxide (HfO₂), lanthanum oxide (La₂O₃), samarium oxide (Sm₂O₃), gadolinium oxide (Gd₂O₃), erbium oxide (Er₂O₃), zirconium oxide (ZrO₂), or cerium oxide (CeO₂).

15. The method of claim 12, wherein the second coating layer comprises at least one of:

aluminum oxide (Al₂O₃), yttrium oxide (Y₂O₃), yttrium fluoride (YF₃), yttrium oxyfluoride (YO_xF_y), aluminum fluoride (AlF₃), scandium oxide (Sc₂O₃), hafnium oxide (HfO₂), lanthanum oxide (La₂O₃), samarium oxide (Sm₂O₃), gadolinium oxide (Gd₂O₃), erbium oxide (Er₂O₃), zirconium oxide (ZrO₂), or cerium oxide (CeO₂).

16. The method of claim 12, wherein the first coating layer is on the gas distribution device and a thickness of the first coating layer ranges between:

1-10,000 nm;

10-2,500 nm;

or 100-500 nm.

17. The method of claim 12, wherein the second coating layer is on the gas distribution device and a thickness of the second coating layer ranges between:

1-10,000 nm;

10-2,500 nm;

or 100-500 nm.

18. The method of claim 12, wherein the first coating layer is on the remote plasma unit and a thickness of the first coating layer ranges between:

1-50,000 nm;

10-25,000 nm;

or 100-10,000 nm.

19. The method of claim 12, wherein the second coating layer is on the remote plasma unit and a thickness of the second coating layer ranges between:

1-50,000 nm;

10-25,000 nm;

or 100-10,000 nm.